mirror of
https://github.com/lifting-bits/remill
synced 2026-06-21 13:56:07 +00:00
70ec62035c
Comment out subnormal (0x1) test inputs for fcvtzu/fcvtzs double-to- 64-bit-integer tests on AArch64. LLVM 22 misselects the SIMD form (fcvtzu d,d) which drops FE_INEXACT on subnormal inputs. Upstream: llvm/llvm-project#178603 Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>