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280c23b4b476a13a16646c1bb5268b4a21fbfca5
lifting-bits-remill
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Peter Goodman
280c23b4b4
Changes to how vectors in memory are read. Cleaned up a bunch of the vector related operator code. Added some extra test cases for memory accesses. I plan to add more.
2016-04-01 18:24:37 -04:00
..
__init__.py
Added Interrupt structure to State structure for x86. It's not an ideal way of configuring interrupts, but it currently seems like the only way to handle conditional interrupts, e.g. via BOUND or INTO. I might need something similar for SYSCALL vs. SYSENTER. Split the build script out into a build script and a build system. Made it so that the IDA script splits interrupts off into their own blocks. This is so that we can restart interrupts by jumping back to the blocks associated with the address of the instruction. Moving the tools stuff out into its own repo as it complicates things to have it in the source.
2016-01-27 14:25:52 -05:00
bootstrap.sh
Test cases for LEA, CPUID, and ENTER.
2016-03-22 13:16:23 -04:00
build.py
Tried to clean up a bit of code. Maybe didn't success so much. Added the beginnings of a data-flow analysis pass. It very aggressively marks condition codes as dead. Next step is to augment it to handle registers.
2016-02-02 22:46:23 -05:00
buildsystem.py
Changes to how vectors in memory are read. Cleaned up a bunch of the vector related operator code. Added some extra test cases for memory accesses. I plan to add more.
2016-04-01 18:24:37 -04:00
compile_semantics.sh
Made is to that the memory intrinsics always read/write byval as opposed to byref for vectors.
2016-02-03 13:32:57 -05:00
ida_get_cfg.py
Tried to clean up a bit of code. Maybe didn't success so much. Added the beginnings of a data-flow analysis pass. It very aggressively marks condition codes as dead. Next step is to augment it to handle registers.
2016-02-02 22:46:23 -05:00
ida_get_cfg.sh
Tried to clean up a bit of code. Maybe didn't success so much. Added the beginnings of a data-flow analysis pass. It very aggressively marks condition codes as dead. Next step is to augment it to handle registers.
2016-02-02 22:46:23 -05:00
install.sh
More ida testing
2016-01-28 11:48:22 -05:00
optimize_bitcode.sh
Minor fix to the register analysis that treats conditional writes as reads (I assumed there was a read operand in there), as it's an implicit data dependency and otherwise introduces undef values.
2016-03-08 20:13:06 -05:00
print_x86_save_state_asm.sh
A few days of changes. First, some fixes in the dead flag/register analysis. It was slightly buggy. The trick was to split the live/dead tracking into two related bitsets that are updated in the same way. The first bitset, the register kill mask is used to mask the union of incoming live registers. This bitset is initially all set, then we update with revives/kills. As a mask, this ensures that certain things are killed. Then there's the revive set, which is initially unset then updated with revives/kills. This is ORed in, in order to ensure that specific flags are revived. This is more like the gen and kill sets in a typical data flow analysis.
2016-02-10 14:16:36 -05:00
run_tests_x86.sh
Implemented inline deferral optimization. Enabled the optimization on the test case builds. Modified cmake to explicitly include LLVM; hopefully that works on macs.
2015-12-17 19:11:02 -05:00