mirror of
https://github.com/lifting-bits/remill
synced 2026-06-21 13:56:07 +00:00
Peter Goodman
3808e9951d
* Refactors the code to improve directory layout, use more std::string_view in place of std::string, deletes some deprecated functions, deprecates some other functions for eventual deletion, and includes semantics for sparcv8 (sparc32) and sparcv9 (sparc64) * Update new dir layout with llvm 11 support * Whoops missing files * Drop llvm 800 from workflow * Minor fix * Move where the install directives are in CMake * Minor fixes * Rename tools/ to bin/. * Minor tweaks * Should fix issues
487 lines
13 KiB
C++
487 lines
13 KiB
C++
/*
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* Copyright (c) 2020 Trail of Bits, Inc.
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*/
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namespace {
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template <typename S1>
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DEF_SEM(LDU, S1 src, R32W dst) {
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WriteZExt(dst, Read(src));
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return memory;
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}
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template <typename S1>
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DEF_SEM(LDS, S1 src, R32W dst) {
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WriteSExt(dst, Read(src));
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return memory;
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}
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template <typename S1>
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DEF_SEM(LDF, S1 src, R32W dst) {
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WriteZExt(dst, Read(src));
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return memory;
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}
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DEF_SEM(LDD, M32 src1, M32 src2, R32W dst1, R32W dst2) {
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Write(dst1, Read(src1));
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Write(dst2, Read(src2));
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return memory;
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}
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template <typename S1, typename D>
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DEF_SEM(ST, S1 src, D dst) {
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WriteZExt(dst, Read(src));
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return memory;
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}
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DEF_SEM(STD, R32 src1, R32 src2, M32W dst1, M32W dst2) {
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Write(dst1, Read(src1));
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Write(dst2, Read(src2));
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return memory;
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}
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template <typename S, typename D>
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DEF_SEM(SETHI, S src, D dst) {
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const auto high_bits = Read(src);
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Write(dst, high_bits);
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return memory;
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}
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template <typename S1, typename S2, typename D>
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DEF_SEM(SET, S1 src1, S2 src2, D dst) {
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const auto high_bits = Read(src1);
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const auto low_bits = Read(src2);
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Write(dst, UOr(high_bits, low_bits));
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return memory;
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}
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template <typename S1, typename S2, typename D1, typename D2>
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DEF_SEM(SETHI_OR, S1 src1, S2 src2, D1 dst1, D2 dst2) {
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const auto high_bits = Read(src1);
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const auto low_bits = Read(src2);
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Write(dst1, high_bits);
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Write(dst2, UOr(high_bits, low_bits));
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return memory;
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}
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template <typename S1, typename S2, typename D1, typename D2>
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DEF_SEM(SETHI_ADD, S1 src1, S2 src2, D1 dst1, D2 dst2) {
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const auto high_bits = Read(src1);
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const auto low_bits = Read(src2);
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Write(dst1, high_bits);
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Write(dst2, UAdd(high_bits, low_bits));
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return memory;
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}
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} // namespace
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DEF_ISEL(LDSB) = LDS<M8>;
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DEF_ISEL(LDUB) = LDU<M8>;
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DEF_ISEL(LDSH) = LDS<M16>;
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DEF_ISEL(LDUH) = LDU<M16>;
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DEF_ISEL(LD) = LDU<M32>;
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DEF_ISEL(LDD) = LDD;
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DEF_ISEL(LDF) = LDF<M32>;
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DEF_ISEL(LDDF) = LDD;
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DEF_ISEL(STB) = ST<R8, M8W>;
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DEF_ISEL(STH) = ST<R16, M16W>;
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DEF_ISEL(ST) = ST<R32, M32W>;
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DEF_ISEL(STD) = STD;
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DEF_ISEL(STX) = ST<R32, M32W>;
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DEF_ISEL(STF) = ST<R32, M32W>;
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DEF_ISEL(STDF) = STD;
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DEF_ISEL(SETHI) = SETHI<I32, R32W>;
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DEF_ISEL(SET) = SET<I32, I32, R32W>;
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DEF_ISEL(SETHI_OR) = SETHI_OR<I32, I32, R32W, R32W>;
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DEF_ISEL(SETHI_ADD) = SETHI_ADD<I32, I32, R32W, R32W>;
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namespace {
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DEF_SEM(CASA, R32 src1, R32 src2, R32W dst) {
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uint32_t rs2 = Read(src2);
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addr_t addr = Read(src1);
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auto addr_rs1 = ReadPtr<uint32_t>(addr);
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uint32_t value_rs1 = Read(addr_rs1);
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if (value_rs1 == rs2) {
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Write(WritePtr<uint32_t>(addr), Read(dst));
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}
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Write(dst, value_rs1);
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return memory;
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}
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DEF_SEM(CASAX, R32 src1, R32 src2, R32W dst) {
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uint32_t rs2 = Read(src2);
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addr_t addr = Read(src1);
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auto addr_rs1 = ReadPtr<uint32_t>(addr);
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uint32_t value_rs1 = Read(addr_rs1);
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if (value_rs1 == rs2) {
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Write(WritePtr<uint32_t>(addr), Read(dst));
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}
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WriteZExt(dst, value_rs1);
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return memory;
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}
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DEF_SEM(SWAP, M32W addr, R32W rd) {
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auto old_addr = Read(addr);
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auto old_rd = Read(rd);
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WriteZExt(addr, old_rd);
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WriteZExt(rd, old_addr);
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return memory;
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}
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template <typename R>
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DEF_SEM(LDSTUB, M8W src_mem, R dst) {
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auto mem_val = Read(src_mem);
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WriteZExt(dst, mem_val);
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Write(src_mem, static_cast<uint8_t>(0xffu));
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return memory;
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}
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}
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DEF_ISEL(CASA) = CASA;
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DEF_ISEL(CASAX) = CASAX;
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DEF_ISEL(SWAP) = SWAP;
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DEF_ISEL(LDSTUB) = LDSTUB<R32W>;
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namespace {
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template <typename S, typename D>
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DEF_SEM(MOVA_icc, S src, D dst) {
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WriteZExt(dst, Read(src));
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return memory;
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}
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template <typename S, typename D>
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DEF_SEM(MOVA_xcc, S src, D dst) {
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WriteZExt(dst, Read(src));
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return memory;
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}
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template <typename S, typename D>
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DEF_SEM(MOVN_icc, S src, D dst) {
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return memory;
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}
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template <typename S, typename D>
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DEF_SEM(MOVN_xcc, S src, D dst) {
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return memory;
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}
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}
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DEF_ISEL(MOVA_icc) = MOVA_icc<R32, R32W>;
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DEF_ISEL(MOVA_xcc) = MOVA_xcc<R32, R32W>;
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DEF_ISEL(MOVN_icc) = MOVN_icc<R32, R32W>;
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DEF_ISEL(MOVN_xcc) = MOVN_xcc<R32, R32W>;
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#define MAKE_SEMANTICS(name, cond, cc) \
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namespace { \
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template <typename S, typename D> \
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DEF_SEM(name ## cond ## _ ## cc, S src, D dst) { \
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auto new_value = Read(src); \
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auto old_value = Read(dst); \
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auto branch_taken = Cond ## cond ## _ ## cc(state); \
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auto value = Select(branch_taken, new_value, \
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decltype(new_value)(old_value)); \
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WriteZExt(dst, value); \
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return memory; \
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} \
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} \
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DEF_ISEL(MOV ## cond ## _ ## cc) = name ## cond ## _ ## cc<R32, R32W>;
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#define MAKE_SEMANTICS_CC(name, cond) \
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MAKE_SEMANTICS(name, cond, icc) \
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MAKE_SEMANTICS(name, cond, xcc)
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#define MAKE_SEMANTICS_FCC(name, cond) \
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MAKE_SEMANTICS(name, cond, fcc0) \
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MAKE_SEMANTICS(name, cond, fcc1) \
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MAKE_SEMANTICS(name, cond, fcc2) \
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MAKE_SEMANTICS(name, cond, fcc3)
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namespace {
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MAKE_SEMANTICS_CC(MOV, NE)
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MAKE_SEMANTICS_CC(MOV, E)
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MAKE_SEMANTICS_CC(MOV, G)
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MAKE_SEMANTICS_CC(MOV, LE)
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MAKE_SEMANTICS_CC(MOV, GE)
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MAKE_SEMANTICS_CC(MOV, L)
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MAKE_SEMANTICS_CC(MOV, GU)
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MAKE_SEMANTICS_CC(MOV, LEU)
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MAKE_SEMANTICS_CC(MOV, CC)
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MAKE_SEMANTICS_CC(MOV, CS)
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MAKE_SEMANTICS_CC(MOV, POS)
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MAKE_SEMANTICS_CC(MOV, NEG)
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MAKE_SEMANTICS_CC(MOV, VC)
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MAKE_SEMANTICS_CC(MOV, VS)
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MAKE_SEMANTICS_FCC(MOVF, U)
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MAKE_SEMANTICS_FCC(MOVF, G)
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MAKE_SEMANTICS_FCC(MOVF, UG)
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MAKE_SEMANTICS_FCC(MOVF, L)
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MAKE_SEMANTICS_FCC(MOVF, UL)
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MAKE_SEMANTICS_FCC(MOVF, LG)
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MAKE_SEMANTICS_FCC(MOVF, NE)
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MAKE_SEMANTICS_FCC(MOVF, E)
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MAKE_SEMANTICS_FCC(MOVF, UE)
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MAKE_SEMANTICS_FCC(MOVF, GE)
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MAKE_SEMANTICS_FCC(MOVF, UGE)
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MAKE_SEMANTICS_FCC(MOVF, LE)
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MAKE_SEMANTICS_FCC(MOVF, ULE)
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MAKE_SEMANTICS_FCC(MOVF, O)
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}
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#undef MAKE_SEMANTICS
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#undef MAKE_SEMANTICS_CC
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#undef MAKE_SEMANTICS_FCC
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#define MAKE_SEMANTICS(name, cond) \
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namespace { \
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template <typename C, typename S, typename D> \
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DEF_SEM(name ## cond, C reg_cc, S src, D dst) { \
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auto new_value = Read(src); \
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auto old_value = Read(dst); \
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auto cc = Read(reg_cc); \
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auto cond_taken = CondR ## cond(state, cc); \
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auto value = Select(cond_taken, new_value, decltype(new_value)(old_value)); \
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WriteZExt(dst, value); \
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return memory; \
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} \
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} \
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DEF_ISEL(MOVR ## cond) = name ## cond<R32, R32, R32W>;
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MAKE_SEMANTICS(MOVR, Z)
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MAKE_SEMANTICS(MOVR, LEZ)
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MAKE_SEMANTICS(MOVR, LZ)
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MAKE_SEMANTICS(MOVR, NZ)
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MAKE_SEMANTICS(MOVR, GZ)
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MAKE_SEMANTICS(MOVR, GEZ)
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#undef MAKE_SEMANTICS
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namespace {
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DEF_SEM(FMoveAlwaysSingle, V32 src, V32W dst) {
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auto new_val = FExtractV32(FReadV32(src), 0);
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FWriteV32(dst, new_val);
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WriteTrunc(FSR_CEXC, 0);
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WriteTrunc(FSR_FTT, 0);
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return memory;
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}
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DEF_SEM(FMoveNeverSingle, V32 src, V32W dst) {
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return memory;
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}
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DEF_SEM(FMoveAlwaysDouble, V64 src, V64W dst) {
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auto new_val = FExtractV64(FReadV64(src), 0);
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FWriteV64(dst, new_val);
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WriteTrunc(FSR_CEXC, 0);
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WriteTrunc(FSR_FTT, 0);
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return memory;
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}
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DEF_SEM(FMoveNeverDouble, V64 src, V64W dst) {
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return memory;
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}
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DEF_SEM(FMoveAlwaysQuad, V64 src, V64W dst) {
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auto new_val = FExtractV64(FReadV64(src), 0);
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FWriteV64(dst, new_val);
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WriteTrunc(FSR_CEXC, 0);
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WriteTrunc(FSR_FTT, 0);
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return memory;
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}
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DEF_SEM(FMoveNeverQuad, V64 src, V64W dst) {
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return memory;
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}
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}
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DEF_ISEL(FMOVSA_icc) = FMoveAlwaysSingle;
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DEF_ISEL(FMOVSA_xcc) = FMoveAlwaysSingle;
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DEF_ISEL(FMOVSA_fcc0) = FMoveAlwaysSingle;
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DEF_ISEL(FMOVSA_fcc1) = FMoveAlwaysSingle;
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DEF_ISEL(FMOVSA_fcc2) = FMoveAlwaysSingle;
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DEF_ISEL(FMOVSA_fcc3) = FMoveAlwaysSingle;
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DEF_ISEL(FMOVSN_icc) = FMoveNeverSingle;
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DEF_ISEL(FMOVSN_xcc) = FMoveNeverSingle;
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DEF_ISEL(FMOVSN_fcc0) = FMoveNeverSingle;
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DEF_ISEL(FMOVSN_fcc1) = FMoveNeverSingle;
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DEF_ISEL(FMOVSN_fcc2) = FMoveNeverSingle;
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DEF_ISEL(FMOVSN_fcc3) = FMoveNeverSingle;
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DEF_ISEL(FMOVDA_icc) = FMoveAlwaysDouble;
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DEF_ISEL(FMOVDA_xcc) = FMoveAlwaysDouble;
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DEF_ISEL(FMOVDA_fcc0) = FMoveAlwaysDouble;
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DEF_ISEL(FMOVDA_fcc1) = FMoveAlwaysDouble;
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DEF_ISEL(FMOVDA_fcc2) = FMoveAlwaysDouble;
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DEF_ISEL(FMOVDA_fcc3) = FMoveAlwaysDouble;
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DEF_ISEL(FMOVDN_icc) = FMoveNeverDouble;
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DEF_ISEL(FMOVDN_xcc) = FMoveNeverDouble;
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DEF_ISEL(FMOVDN_fcc0) = FMoveNeverDouble;
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DEF_ISEL(FMOVDN_fcc1) = FMoveNeverDouble;
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DEF_ISEL(FMOVDN_fcc2) = FMoveNeverDouble;
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DEF_ISEL(FMOVDN_fcc3) = FMoveNeverDouble;
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DEF_ISEL(FMOVQA_icc) = FMoveAlwaysQuad;
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DEF_ISEL(FMOVQA_xcc) = FMoveAlwaysQuad;
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DEF_ISEL(FMOVQA_fcc0) = FMoveAlwaysQuad;
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DEF_ISEL(FMOVQA_fcc1) = FMoveAlwaysQuad;
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DEF_ISEL(FMOVQA_fcc2) = FMoveAlwaysQuad;
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DEF_ISEL(FMOVQA_fcc3) = FMoveAlwaysQuad;
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DEF_ISEL(FMOVQN_icc) = FMoveNeverQuad;
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DEF_ISEL(FMOVQN_xcc) = FMoveNeverQuad;
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DEF_ISEL(FMOVQN_fcc0) = FMoveNeverQuad;
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DEF_ISEL(FMOVQN_fcc1) = FMoveNeverQuad;
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DEF_ISEL(FMOVQN_fcc2) = FMoveNeverQuad;
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DEF_ISEL(FMOVQN_fcc3) = FMoveNeverQuad;
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#define MAKE_SEMANTICS(name, cond, cc) \
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namespace { \
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DEF_SEM(FMOVS ## cond ## _ ## cc, V32 src, V32W dst) { \
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auto new_val = FExtractV32(FReadV32(src), 0); \
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auto old_val = FExtractV32(FReadV32(dst), 0); \
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auto branch_taken = Cond ## cond ## _ ## cc(state); \
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auto value = Select(branch_taken, new_val, \
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decltype(new_val)(old_val)); \
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FWriteV32(dst, value); \
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WriteTrunc(FSR_CEXC, 0); \
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WriteTrunc(FSR_FTT, 0); \
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return memory; \
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} \
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DEF_SEM(FMOVD ## cond ## _ ## cc, V64 src, V64W dst) { \
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auto new_val = FExtractV64(FReadV64(src), 0); \
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auto old_val = FExtractV64(FReadV64(dst), 0); \
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auto branch_taken = Cond ## cond ## _ ## cc(state); \
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auto value = Select(branch_taken, new_val, \
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decltype(new_val)(old_val)); \
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FWriteV64(dst, value); \
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WriteTrunc(FSR_CEXC, 0); \
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WriteTrunc(FSR_FTT, 0); \
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return memory; \
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} \
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DEF_SEM(FMOVQ ## cond ## _ ## cc, V64 src, V64W dst) { \
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auto new_val = FExtractV64(FReadV64(src), 0); \
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auto old_val = FExtractV64(FReadV64(dst), 0); \
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auto branch_taken = Cond ## cond ## _ ## cc(state); \
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auto value = Select(branch_taken, new_val, \
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decltype(new_val)(old_val)); \
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FWriteV64(dst, value); \
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WriteTrunc(FSR_CEXC, 0); \
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WriteTrunc(FSR_FTT, 0); \
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return memory; \
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} \
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} \
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DEF_ISEL(FMOVS ## cond ## _ ## cc) = FMOVS ## cond ## _ ## cc; \
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DEF_ISEL(FMOVD ## cond ## _ ## cc) = FMOVD ## cond ## _ ## cc; \
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DEF_ISEL(FMOVQ ## cond ## _ ## cc) = FMOVQ ## cond ## _ ## cc;
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#define MAKE_SEMANTICS_CC(name, cond) \
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MAKE_SEMANTICS(name, cond, icc) \
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MAKE_SEMANTICS(name, cond, xcc)
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#define MAKE_SEMANTICS_FCC(name, cond) \
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MAKE_SEMANTICS(name, cond, fcc0) \
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MAKE_SEMANTICS(name, cond, fcc1) \
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MAKE_SEMANTICS(name, cond, fcc2) \
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MAKE_SEMANTICS(name, cond, fcc3)
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MAKE_SEMANTICS_CC(FMOV, NE)
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MAKE_SEMANTICS_CC(FMOV, E)
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MAKE_SEMANTICS_CC(FMOV, G)
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MAKE_SEMANTICS_CC(FMOV, LE)
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MAKE_SEMANTICS_CC(FMOV, GE)
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MAKE_SEMANTICS_CC(FMOV, L)
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MAKE_SEMANTICS_CC(FMOV, GU)
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MAKE_SEMANTICS_CC(FMOV, LEU)
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MAKE_SEMANTICS_CC(FMOV, CC)
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MAKE_SEMANTICS_CC(FMOV, CS)
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MAKE_SEMANTICS_CC(FMOV, POS)
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MAKE_SEMANTICS_CC(FMOV, NEG)
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MAKE_SEMANTICS_CC(FMOV, VC)
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MAKE_SEMANTICS_CC(FMOV, VS)
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MAKE_SEMANTICS_FCC(FMOV, U)
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MAKE_SEMANTICS_FCC(FMOV, G)
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MAKE_SEMANTICS_FCC(FMOV, UG)
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MAKE_SEMANTICS_FCC(FMOV, L)
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MAKE_SEMANTICS_FCC(FMOV, UL)
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MAKE_SEMANTICS_FCC(FMOV, LG)
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MAKE_SEMANTICS_FCC(FMOV, NE)
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MAKE_SEMANTICS_FCC(FMOV, E)
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MAKE_SEMANTICS_FCC(FMOV, UE)
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MAKE_SEMANTICS_FCC(FMOV, GE)
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MAKE_SEMANTICS_FCC(FMOV, UGE)
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MAKE_SEMANTICS_FCC(FMOV, LE)
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MAKE_SEMANTICS_FCC(FMOV, ULE)
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MAKE_SEMANTICS_FCC(FMOV, O)
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#undef MAKE_SEMANTICS
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#undef MAKE_SEMANTICS_CC
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#undef MAKE_SEMANTICS_FCC
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#define MAKE_SEMANTICS(name, cond) \
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namespace { \
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DEF_SEM(name ## S ## cond, R32 reg_cc, V32 src, V32W dst) { \
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auto new_val = FExtractV32(FReadV32(src), 0); \
|
|
auto old_val = FExtractV32(FReadV32(dst), 0); \
|
|
auto cc = Read(reg_cc); \
|
|
auto cond_taken = CondR ## cond(state, cc); \
|
|
auto value = Select(cond_taken, \
|
|
new_val, \
|
|
decltype(new_val)(old_val)); \
|
|
FWriteV32(dst, value); \
|
|
WriteTrunc(FSR_CEXC, 0); \
|
|
WriteTrunc(FSR_FTT, 0); \
|
|
return memory; \
|
|
} \
|
|
DEF_SEM(name ## D ## cond, R32 reg_cc, V64 src, V64W dst) { \
|
|
auto new_val = FExtractV64(FReadV64(src), 0); \
|
|
auto old_val = FExtractV64(FReadV64(dst), 0); \
|
|
auto cc = Read(reg_cc); \
|
|
auto cond_taken = CondR ## cond(state, cc); \
|
|
auto value = Select(cond_taken, \
|
|
new_val, \
|
|
decltype(new_val)(old_val)); \
|
|
FWriteV64(dst, value); \
|
|
WriteTrunc(FSR_CEXC, 0); \
|
|
WriteTrunc(FSR_FTT, 0); \
|
|
return memory; \
|
|
} \
|
|
DEF_SEM(name ## Q ## cond, R32 reg_cc, V64 src, V64W dst) { \
|
|
auto new_val = FExtractV64(FReadV64(src), 0); \
|
|
auto old_val = FExtractV64(FReadV64(dst), 0); \
|
|
auto cc = Read(reg_cc); \
|
|
auto cond_taken = CondR ## cond(state, cc); \
|
|
auto value = Select(cond_taken, \
|
|
new_val, \
|
|
decltype(new_val)(old_val)); \
|
|
FWriteV64(dst, value); \
|
|
WriteTrunc(FSR_CEXC, 0); \
|
|
WriteTrunc(FSR_FTT, 0); \
|
|
return memory; \
|
|
} \
|
|
} \
|
|
DEF_ISEL(name ## S ## cond) = name ## S ## cond; \
|
|
DEF_ISEL(name ## D ## cond) = name ## D ## cond; \
|
|
DEF_ISEL(name ## Q ## cond) = name ## Q ## cond;
|
|
|
|
MAKE_SEMANTICS(FMOVR, Z)
|
|
MAKE_SEMANTICS(FMOVR, LEZ)
|
|
MAKE_SEMANTICS(FMOVR, LZ)
|
|
MAKE_SEMANTICS(FMOVR, NZ)
|
|
MAKE_SEMANTICS(FMOVR, GZ)
|
|
MAKE_SEMANTICS(FMOVR, GEZ)
|