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5eef7ead59b8995aebc58205bc26c1de03ec446a
lifting-bits-remill
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Peter Goodman
5eef7ead59
Re-introducing cfg::Instr. Marked extern funcs as not builtin so that they won't conflict with builtins needed to implement fpu instructions. Updated the address translation to have the scale be signed, and to implement the displacement as an add for positive numbers, and a subtract for negative numbers.
2016-08-29 12:47:28 -04:00
..
__init__.py
Added Interrupt structure to State structure for x86. It's not an ideal way of configuring interrupts, but it currently seems like the only way to handle conditional interrupts, e.g. via BOUND or INTO. I might need something similar for SYSCALL vs. SYSENTER. Split the build script out into a build script and a build system. Made it so that the IDA script splits interrupts off into their own blocks. This is so that we can restart interrupts by jumping back to the blocks associated with the address of the instruction. Moving the tools stuff out into its own repo as it complicates things to have it in the source.
2016-01-27 14:25:52 -05:00
binja_get_cfg.py
Re-introducing cfg::Instr. Marked extern funcs as not builtin so that they won't conflict with builtins needed to implement fpu instructions. Updated the address translation to have the scale be signed, and to implement the displacement as an add for positive numbers, and a subtract for negative numbers.
2016-08-29 12:47:28 -04:00
bootstrap.sh
Added tests for MOVQ. Starting implementation of FPU instructions and tests. Change how instruction lifting is done. The arch side of lifting is now separate from all bitcode concerns. remill/BC/Translator.cpp is now heavier weight in what it does.
2016-08-26 15:59:52 -04:00
build.py
Rename all references from mcsema2 to remill
2016-06-23 11:39:36 -04:00
buildsystem.py
Starting to add some more FPU stuff, though untested. Decided on a simpler way of handling conversions between float80_ts and float64_ts. The idea is to just punt on float80_ts, with the idea that all sources of them will come via memory locations, or at attach/detach time.
2016-08-08 17:05:44 -04:00
compile_semantics.sh
Added tests for MOVQ. Starting implementation of FPU instructions and tests. Change how instruction lifting is done. The arch side of lifting is now separate from all bitcode concerns. remill/BC/Translator.cpp is now heavier weight in what it does.
2016-08-26 15:59:52 -04:00
finalize_bitcode.sh
Rename all references from mcsema2 to remill
2016-06-23 11:39:36 -04:00
install.sh
Rename all references from mcsema2 to remill
2016-06-23 11:39:36 -04:00
optimize_bitcode.sh
Got all BITBYTE instructions and tests working.
2016-08-08 17:05:43 -04:00
print_x86_save_state_asm.sh
A few days of changes. First, some fixes in the dead flag/register analysis. It was slightly buggy. The trick was to split the live/dead tracking into two related bitsets that are updated in the same way. The first bitset, the register kill mask is used to mask the union of incoming live registers. This bitset is initially all set, then we update with revives/kills. As a mask, this ensures that certain things are killed. Then there's the revive set, which is initially unset then updated with revives/kills. This is ORed in, in order to ensure that specific flags are revived. This is more like the gen and kill sets in a typical data flow analysis.
2016-02-10 14:16:36 -05:00
run_tests_x86.sh
Rename all references from mcsema2 to remill
2016-06-23 11:39:36 -04:00