mirror of
https://github.com/lifting-bits/remill
synced 2026-06-21 13:56:07 +00:00
Duncan Ogilvie
51 lines
1.5 KiB
C++
51 lines
1.5 KiB
C++
/*
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* Copyright (c) 2017 Trail of Bits, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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namespace {
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DEF_SEM(DoXGETBV, PC next_pc) {
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switch (Read(REG_ECX)) {
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// Current state of the `xcr0` register.
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case 0:
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WriteZExt(IF_64BIT_ELSE(REG_RAX, REG_EAX), state.xcr0.eax);
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WriteZExt(IF_64BIT_ELSE(REG_RDX, REG_EDX), state.xcr0.edx);
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break;
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// Current state of the `xcr0` register, anded with the `xinuse` register.
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// We fake this as saying: this is what
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case 1: {
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XCR0 xcr0 = {};
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xcr0.x87_fpu_mmx = 1;
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xcr0.xmm = 1;
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IF_AVX(xcr0.ymm = 1;)
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IF_AVX512(xcr0.opmask = 1;)
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IF_AVX512(xcr0.zmm_hi256 = 1;)
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IF_AVX512(xcr0.hi16_zmm = 1;)
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WriteZExt(IF_64BIT_ELSE(REG_RAX, REG_EAX), xcr0.eax);
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WriteZExt(IF_64BIT_ELSE(REG_RDX, REG_EDX), xcr0.edx);
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break;
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}
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default: WriteZExt(REG_PC, Read(next_pc)); StopFailure();
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}
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return memory;
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}
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} // namespace
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DEF_ISEL(XGETBV) = DoXGETBV;
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