mirror of
https://github.com/lifting-bits/remill
synced 2026-06-21 13:56:07 +00:00
Peter Goodman
99df2e19d4
* Running clang-format on files with some additional custom scripts for my style * Fix missing unique_ptr in remill/BC/Optimizer.h * Fixes and selective disabling of clang-format
228 lines
8.4 KiB
C
228 lines
8.4 KiB
C
/*
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* Copyright (c) 2017 Trail of Bits, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#ifndef ADDRESS_SIZE_BITS
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# define ADDRESS_SIZE_BITS 64UL
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#endif
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#ifndef ADDRESS_SIZE_BYTES
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# define ADDRESS_SIZE_BYTES static_cast<addr_t>(ADDRESS_SIZE_BITS / 8)
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#endif
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#if 64 == ADDRESS_SIZE_BITS
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# define IF_32BIT(...)
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# define IF_64BIT(...) __VA_ARGS__
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# define _IF_32BIT(...)
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# define _IF_64BIT(...) , __VA_ARGS__
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# define IF_64BIT_ELSE(a, b) a
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# define IF_32BIT_ELSE(a, b) b
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# define aword qword
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#else
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# define IF_32BIT(...) __VA_ARGS__
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# define IF_64BIT(...)
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# define _IF_32BIT(...) , __VA_ARGS__
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# define _IF_64BIT(...)
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# define IF_64BIT_ELSE(a, b) b
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# define IF_32BIT_ELSE(a, b) a
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# define aword dword
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#endif
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// Attributes that will force inlining of specific code.
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#define ALWAYS_INLINE [[gnu::always_inline]] inline
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#define NEVER_INLINE [[gnu::noinline]]
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// Define a specific instruction selection variable.
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#define DEF_ISEL(name) extern "C" constexpr auto ISEL_##name [[gnu::used]]
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// Define a conditional execution function.
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#define DEF_COND(name) extern "C" constexpr auto COND_##name [[gnu::used]]
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// Define a semantics implementing function.
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#define DEF_SEM(name, ...) \
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ALWAYS_INLINE __attribute__((flatten)) static Memory *name( \
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Memory *memory, State &state, ##__VA_ARGS__)
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// Define a semantics implementing function.
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#define DEF_HELPER(name, ...) \
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ALWAYS_INLINE __attribute__((flatten)) static auto name( \
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Memory *&memory, State &state, ##__VA_ARGS__)
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// An instruction where the implementation is the same for all operand sizes.
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#define DEF_ISEL_ALL(name, func) \
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DEF_ISEL(name##_8) = func; \
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DEF_ISEL(name##_16) = func; \
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DEF_ISEL(name##_32) = func; \
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DEF_ISEL(name##_64) = func
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// An instruction where the implementation is the same for all operand sizes
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// and where only 32- and 64-bit operand sizes are supported.
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#define DEF_ISEL_32or64(name, func) \
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IF_32BIT(DEF_ISEL(name##_32) = func) \
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IF_64BIT(DEF_ISEL(name##_64) = func)
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// An instruction with no explicit destination operand that reads either a
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// 32- or a 64-bit register or immediate value.
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#define DEF_ISEL_RI32or64(name, func) \
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IF_32BIT(DEF_ISEL(name##_32) = func<I32>) \
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IF_64BIT(DEF_ISEL(name##_64) = func<I64>)
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// An instruction with a single 32- or 64-bit register destination operand.
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#define DEF_ISEL_R32or64W(name, func) \
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IF_32BIT(DEF_ISEL(name##_32) = func<R32W>) \
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IF_64BIT(DEF_ISEL(name##_64) = func<R64W>)
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// An instruction with a single 32- or 64-bit memory destination operand.
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#define DEF_ISEL_M32or64(name, func) \
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IF_32BIT(DEF_ISEL(name##_32) = func<M32>) \
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IF_64BIT(DEF_ISEL(name##_64) = func<M64>)
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// An instruction with a single 32- or 64-bit memory destination operand.
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#define DEF_ISEL_M32or64W(name, func) \
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IF_32BIT(DEF_ISEL(name##_32) = func<M32W>) \
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IF_64BIT(DEF_ISEL(name##_64) = func<M64W>)
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// An instruction with a single, explicit source operand (register).
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#define DEF_ISEL_Rn(name, tpl_func) \
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DEF_ISEL(name##_8) = tpl_func<R8>; \
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DEF_ISEL(name##_16) = tpl_func<R16>; \
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DEF_ISEL(name##_32) = \
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tpl_func<R32> IF_64BIT(; DEF_ISEL(name##_64) = tpl_func<R64>)
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// An instruction with a single, explicit destination operand (register).
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#define DEF_ISEL_RnW(name, tpl_func) \
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DEF_ISEL(name##_8) = tpl_func<R8W>; \
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DEF_ISEL(name##_16) = tpl_func<R16W>; \
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DEF_ISEL(name##_32) = \
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tpl_func<R32W> IF_64BIT(; DEF_ISEL(name##_64) = tpl_func<R64W>)
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// An instruction with a single, explicit source operand (memory).
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#define DEF_ISEL_Mn(name, tpl_func) \
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DEF_ISEL(name##_8) = tpl_func<M8>; \
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DEF_ISEL(name##_16) = tpl_func<M16>; \
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DEF_ISEL(name##_32) = \
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tpl_func<M32> IF_64BIT(; DEF_ISEL(name##_64) = tpl_func<M64>)
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// An instruction with a single, explicit destination operand (memory).
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#define DEF_ISEL_MnW(name, tpl_func) \
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DEF_ISEL(name##_8) = tpl_func<M8W>; \
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DEF_ISEL(name##_16) = tpl_func<M16W>; \
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DEF_ISEL(name##_32) = \
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tpl_func<M32W> IF_64BIT(; DEF_ISEL(name##_64) = tpl_func<M64W>)
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// An instruction with no explicit destination operand and an immediate source.
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#define DEF_ISEL_In(name, tpl_func) \
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DEF_ISEL(name##_8) = tpl_func<I8>; \
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DEF_ISEL(name##_16) = tpl_func<I16>; \
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DEF_ISEL(name##_32) = \
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tpl_func<I32> IF_64BIT(; DEF_ISEL(name##_64) = tpl_func<I64>)
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// Two source operand instruction
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#define _DEF_ISEL_Xn_Yn(X, Y, name, tpl_func) \
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DEF_ISEL(name##_8) = tpl_func<X##8, Y##8>; \
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DEF_ISEL(name##_16) = tpl_func<X##16, Y##16>; \
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DEF_ISEL(name##_32) = tpl_func<X##32, Y##32> IF_64BIT( \
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; DEF_ISEL(name##_64) = tpl_func<X##64, Y##64>)
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#define DEF_ISEL_Rn_Mn(name, tpl_func) _DEF_ISEL_Xn_Yn(R, M, name, tpl_func)
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#define DEF_ISEL_Rn_Rn(name, tpl_func) _DEF_ISEL_Xn_Yn(R, R, name, tpl_func)
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#define DEF_ISEL_Rn_In(name, tpl_func) _DEF_ISEL_Xn_Yn(R, I, name, tpl_func)
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#define DEF_ISEL_Mn_In(name, tpl_func) _DEF_ISEL_Xn_Yn(M, I, name, tpl_func)
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#define DEF_ISEL_Mn_Rn(name, tpl_func) _DEF_ISEL_Xn_Yn(M, R, name, tpl_func)
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// One destination, one source operand instruction.
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#define _DEF_ISEL_XnW_Yn(X, Y, name, tpl_func) \
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DEF_ISEL(name##_8) = tpl_func<X##8W, Y##8>; \
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DEF_ISEL(name##_16) = tpl_func<X##16W, Y##16>; \
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DEF_ISEL(name##_32) = tpl_func<X##32W, Y##32> IF_64BIT( \
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; DEF_ISEL(name##_64) = tpl_func<X##64W, Y##64>)
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#define DEF_ISEL_RnW_Mn(name, tpl_func) _DEF_ISEL_XnW_Yn(R, M, name, tpl_func)
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#define DEF_ISEL_RnW_Rn(name, tpl_func) _DEF_ISEL_XnW_Yn(R, R, name, tpl_func)
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#define DEF_ISEL_RnW_In(name, tpl_func) _DEF_ISEL_XnW_Yn(R, I, name, tpl_func)
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#define DEF_ISEL_MnW_In(name, tpl_func) _DEF_ISEL_XnW_Yn(M, I, name, tpl_func)
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#define DEF_ISEL_MnW_Rn(name, tpl_func) _DEF_ISEL_XnW_Yn(M, R, name, tpl_func)
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#define DEF_ISEL_MnW_Mn(name, tpl_func) _DEF_ISEL_XnW_Yn(M, M, name, tpl_func)
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// One destination, two source operand instruction
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#define _DEF_ISEL_XnW_Yn_Zn(X, Y, Z, name, tpl_func) \
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DEF_ISEL(name##_8) = tpl_func<X##8W, Y##8, Z##8>; \
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DEF_ISEL(name##_16) = tpl_func<X##16W, Y##16, Z##16>; \
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DEF_ISEL(name##_32) = tpl_func<X##32W, Y##32, Z##32> IF_64BIT( \
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; DEF_ISEL(name##_64) = tpl_func<X##64W, Y##64, Z##64>)
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#define _DEF_ISEL_XnW_Xn_Yn_Zn(X, Y, Z, name, tpl_func) \
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DEF_ISEL(name##_8) = tpl_func<X##8W, X##8, Y##8, Z##8>; \
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DEF_ISEL(name##_16) = tpl_func<X##16W, X##16, Y##16, Z##16>; \
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DEF_ISEL(name##_32) = tpl_func<X##32W, X##32, Y##32, Z##32> IF_64BIT( \
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; DEF_ISEL(name##_64) = tpl_func<X##64W, X##64, Y##64, Z##64>)
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#define DEF_ISEL_RnW_Rn_Mn(name, tpl_func) \
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_DEF_ISEL_XnW_Yn_Zn(R, R, M, name, tpl_func)
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// Three operand: REG_a <- REG_a OP REG_b.
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#define DEF_ISEL_RnW_Rn_Rn(name, tpl_func) \
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_DEF_ISEL_XnW_Yn_Zn(R, R, R, name, tpl_func)
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// Three operand: REG_a <- REG_a OP IMM.
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#define DEF_ISEL_RnW_Rn_In(name, tpl_func) \
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_DEF_ISEL_XnW_Yn_Zn(R, R, I, name, tpl_func)
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#define _DEF_ISEL_XnW_Xn_YnW_Yn(X, Y, name, tpl_func) \
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DEF_ISEL(name##_8) = tpl_func<X##8W, X##8, Y##8W, Y##8>; \
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DEF_ISEL(name##_16) = tpl_func<X##16W, X##16, Y##16W, Y##16>; \
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DEF_ISEL(name##_32) = tpl_func<X##32W, X##32, Y##32W, Y##32> IF_64BIT( \
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; DEF_ISEL(name##_64) = tpl_func<X##64W, X##64, Y##64W, Y##64>)
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#define DEF_ISEL_MnW_Mn_RnW_Rn(name, tpl_func) \
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_DEF_ISEL_XnW_Xn_YnW_Yn(M, R, name, tpl_func)
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#define DEF_ISEL_RnW_Rn_RnW_Rn(name, tpl_func) \
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_DEF_ISEL_XnW_Xn_YnW_Yn(R, R, name, tpl_func)
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#define DEF_ISEL_RnW_Mn_In(name, tpl_func) \
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_DEF_ISEL_XnW_Yn_Zn(R, M, I, name, tpl_func)
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#define DEF_ISEL_MnW_Mn_Rn(name, tpl_func) \
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_DEF_ISEL_XnW_Yn_Zn(M, M, R, name, tpl_func)
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#define DEF_ISEL_MnW_Mn_In(name, tpl_func) \
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_DEF_ISEL_XnW_Yn_Zn(M, M, I, name, tpl_func)
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#define DEF_ISEL_MnW_Mn_Rn_In(name, tpl_func) \
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_DEF_ISEL_XnW_Xn_Yn_Zn(M, R, I, name, tpl_func)
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#define DEF_ISEL_RnW_Rn_Rn_In(name, tpl_func) \
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_DEF_ISEL_XnW_Xn_Yn_Zn(R, R, I, name, tpl_func)
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#define DEF_ISEL_MnW_Mn_Rn_Rn(name, tpl_func) \
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_DEF_ISEL_XnW_Xn_Yn_Zn(M, R, R, name, tpl_func)
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#define DEF_ISEL_RnW_Rn_Rn_Rn(name, tpl_func) \
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_DEF_ISEL_XnW_Xn_Yn_Zn(R, R, R, name, tpl_func)
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