mirror of
https://github.com/lifting-bits/remill
synced 2026-06-21 13:56:07 +00:00
Peter Goodman
99df2e19d4
* Running clang-format on files with some additional custom scripts for my style * Fix missing unique_ptr in remill/BC/Optimizer.h * Fixes and selective disabling of clang-format
143 lines
4.5 KiB
C++
143 lines
4.5 KiB
C++
/*
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* Copyright (c) 2017 Trail of Bits, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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namespace {
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template <typename T>
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DEF_SEM(CALL, T target_pc, IF_32BIT_ELSE(R32W, R64W) pc_dst, PC return_pc,
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IF_32BIT_ELSE(R32W, R64W) return_pc_dst) {
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addr_t next_sp = USub(REG_XSP, ADDRESS_SIZE_BYTES);
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const auto new_pc = ZExtTo<addr_t>(Read(target_pc));
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Write(WritePtr<addr_t>(next_sp _IF_32BIT(REG_SS_BASE)), Read(return_pc));
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Write(REG_XSP, next_sp);
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Write(REG_PC, new_pc);
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Write(pc_dst, new_pc);
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Write(return_pc_dst, Read(return_pc));
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return memory;
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}
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DEF_SEM(RET_IMM, I16 bytes, IF_32BIT_ELSE(R32W, R64W) pc_dst) {
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const auto new_pc = Read(ReadPtr<addr_t>(REG_XSP _IF_32BIT(REG_SS_BASE)));
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Write(REG_PC, new_pc);
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Write(pc_dst, new_pc);
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Write(REG_XSP,
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UAdd(UAdd(REG_XSP, ZExtTo<addr_t>(Read(bytes))), ADDRESS_SIZE_BYTES));
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return memory;
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}
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DEF_SEM(RET, IF_32BIT_ELSE(R32W, R64W) pc_dst) {
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const auto new_pc = Read(ReadPtr<addr_t>(REG_XSP _IF_32BIT(REG_SS_BASE)));
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Write(REG_PC, new_pc);
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Write(pc_dst, new_pc);
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Write(REG_XSP, UAdd(REG_XSP, ADDRESS_SIZE_BYTES));
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return memory;
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}
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} // namespace
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DEF_ISEL_32or64(CALL_NEAR_RELBRd, CALL<PC>);
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DEF_ISEL_32or64(CALL_NEAR_RELBRz, CALL<PC>);
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IF_32BIT(DEF_ISEL(CALL_NEAR_MEMv_16) = CALL<M16>;)
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IF_32BIT(DEF_ISEL(CALL_NEAR_MEMv_32) = CALL<M32>;)
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IF_64BIT(DEF_ISEL(CALL_NEAR_MEMv_64) = CALL<M64>;)
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IF_32BIT(DEF_ISEL(CALL_NEAR_GPRv_16) = CALL<R16>;)
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IF_32BIT(DEF_ISEL(CALL_NEAR_GPRv_32) = CALL<R32>;)
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IF_64BIT(DEF_ISEL(CALL_NEAR_GPRv_64) = CALL<R64>;)
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/*
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352 CALL_FAR CALL_FAR_MEMp2 CALL BASE I86 ATTRIBUTES: FAR_XFER FIXED_BASE1 NOTSX SCALABLE STACKPUSH1
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353 CALL_FAR CALL_FAR_PTRp_IMMw CALL BASE I86 ATTRIBUTES: FAR_XFER FIXED_BASE0 NOTSX SCALABLE STACKPUSH0
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*/
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DEF_ISEL_32or64(RET_NEAR_IMMw, RET_IMM);
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DEF_ISEL_32or64(RET_NEAR, RET);
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/*
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1073 RET_FAR RET_FAR_IMMw RET BASE I86 ATTRIBUTES: FAR_XFER FIXED_BASE0 NOTSX SCALABLE STACKPOP0
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1074 RET_FAR RET_FAR RET BASE I86 ATTRIBUTES: FAR_XFER FIXED_BASE0 NOTSX SCALABLE STACKPOP0
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1666 IRETQ IRETQ RET LONGMODE LONGMODE ATTRIBUTES: FIXED_BASE0 NOTSX SCALABLE STACKPOP0
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1784 IRET IRET RET BASE I86 ATTRIBUTES: FIXED_BASE0 NOTSX SCALABLE STACKPOP0
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728 IRETD IRETD RET BASE I386 ATTRIBUTES: FIXED_BASE0 NOTSX SCALABLE STACKPOP0
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*/
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namespace {
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#if ADDRESS_SIZE_BITS == 32
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DEF_SEM(IRETD, IF_32BIT_ELSE(R32W, R64W) pc_dst) {
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auto new_eip = PopFromStack<uint32_t>(memory, state);
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auto new_cs = static_cast<uint16_t>(PopFromStack<uint32_t>(memory, state));
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auto temp_eflags = PopFromStack<uint32_t>(memory, state);
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Flags f = {};
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f.flat = (temp_eflags & 0x257FD5U) | 0x1A0000U;
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Write(REG_PC, new_eip);
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Write(pc_dst, new_eip);
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Write(REG_CS.flat, new_cs);
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state.rflag = f;
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state.aflag.af = f.af;
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state.aflag.cf = f.cf;
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state.aflag.df = f.df;
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state.aflag.of = f.of;
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state.aflag.pf = f.pf;
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state.aflag.sf = f.sf;
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state.aflag.zf = f.zf;
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state.hyper_call = AsyncHyperCall::kX86IRet;
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return memory;
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}
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DEF_ISEL(IRETD_32) = IRETD;
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#elif ADDRESS_SIZE_BITS == 64
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DEF_SEM(IRETQ, IF_32BIT_ELSE(R32W, R64W) pc_dst) {
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auto new_rip = PopFromStack<uint64_t>(memory, state);
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auto new_cs = static_cast<uint16_t>(PopFromStack<uint64_t>(memory, state));
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auto temp_rflags = PopFromStack<uint64_t>(memory, state);
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Flags f = {};
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f.flat = temp_rflags;
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Write(REG_PC, new_rip);
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Write(pc_dst, new_rip);
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Write(REG_CS.flat, new_cs);
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state.rflag = f;
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state.aflag.af = f.af;
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state.aflag.cf = f.cf;
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state.aflag.df = f.df;
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state.aflag.of = f.of;
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state.aflag.pf = f.pf;
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state.aflag.sf = f.sf;
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state.aflag.zf = f.zf;
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state.hyper_call = AsyncHyperCall::kX86IRet;
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// TODO(tathanhdinh): Update the hidden part (segment shadow) of CS,
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// see Issue #334
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auto new_rsp = PopFromStack<uint64_t>(memory, state);
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auto new_ss = static_cast<uint16_t>(PopFromStack<uint64_t>(memory, state));
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Write(REG_RSP, new_rsp);
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Write(REG_SS.flat, new_ss);
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// TODO(tathanhdinh): Update the hidden part (segment shadow) of SS,
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// see Issue #334
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return memory;
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}
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DEF_ISEL(IRETQ_64) = IRETQ;
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#endif
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} // namespace
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