mirror of
https://github.com/lifting-bits/remill
synced 2026-06-21 13:56:07 +00:00
Peter Goodman
99df2e19d4
* Running clang-format on files with some additional custom scripts for my style * Fix missing unique_ptr in remill/BC/Optimizer.h * Fixes and selective disabling of clang-format
385 lines
11 KiB
C++
385 lines
11 KiB
C++
/*
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* Copyright (c) 2017 Trail of Bits, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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namespace {
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template <typename D, typename S1, typename S2>
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DEF_SEM(SHR, D dst, S1 src1, S2 src2) {
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auto val = Read(src1);
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auto shift = Read(src2);
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auto long_mask = Literal<S1>(0x3F);
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auto short_mask = Literal<S1>(0x1F);
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auto op_size = BitSizeOf(src1);
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auto shift_mask = Select(UCmpEq(op_size, 64), long_mask, short_mask);
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auto masked_shift = UAnd(shift, shift_mask);
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if (UCmpEq(masked_shift, 0)) {
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WriteZExt(dst, val);
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return memory; // No flags affected.
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}
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auto new_val = val;
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auto new_of = false;
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auto new_cf = false;
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if (UCmpEq(masked_shift, 1)) {
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new_of = SignFlag(val);
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new_cf = UCmpEq(UAnd(val, 1), 1);
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new_val = UShr(val, 1);
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} else if (UCmpLt(masked_shift, op_size)) {
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auto res = UShr(val, USub(masked_shift, 1));
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new_of = BUndefined();
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new_cf = UCmpEq(UAnd(res, 1), 1);
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new_val = UShr(res, 1);
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} else {
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new_of = BUndefined();
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new_cf = BUndefined();
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new_val = 0;
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}
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WriteZExt(dst, new_val);
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Write(FLAG_CF, new_cf);
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Write(FLAG_PF, ParityFlag(new_val));
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Write(FLAG_AF, BUndefined());
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Write(FLAG_ZF, ZeroFlag(new_val));
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Write(FLAG_SF, false);
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Write(FLAG_OF, new_of);
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return memory;
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}
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template <typename D, typename S1, typename S2>
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DEF_SEM(SAR, D dst, S1 src1, S2 src2) {
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auto uval = Read(src1);
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auto shift = Read(src2);
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auto val = Signed(uval);
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auto one = SLiteral<S1>(1);
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auto long_mask = Literal<S1>(0x3F);
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auto short_mask = Literal<S1>(0x1F);
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auto op_size = BitSizeOf(src1);
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auto shift_mask = Select(UCmpEq(op_size, 64), long_mask, short_mask);
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auto masked_shift = UAnd(shift, shift_mask);
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if (UCmpEq(masked_shift, 0)) {
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WriteZExt(dst, uval);
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return memory; // No flags affected.
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}
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auto new_val = uval;
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auto new_of = false;
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auto new_cf = false;
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if (UCmpEq(masked_shift, 1)) {
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new_of = false;
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new_cf = UCmpEq(UAnd(uval, 1), 1);
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new_val = Unsigned(SShr(val, one));
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} else if (UCmpLt(masked_shift, op_size)) {
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auto res = SShr(val, Signed(USub(masked_shift, 1)));
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new_of = BUndefined();
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new_cf = SCmpEq(SAnd(res, one), one);
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new_val = Unsigned(SShr(res, one));
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} else {
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new_of = BUndefined();
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new_cf = BUndefined();
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if (SignFlag(val)) {
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new_val = Maximize(uval);
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} else {
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new_val = 0;
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}
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}
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WriteZExt(dst, new_val);
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Write(FLAG_CF, new_cf);
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Write(FLAG_PF, ParityFlag(new_val));
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Write(FLAG_AF, BUndefined());
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Write(FLAG_ZF, ZeroFlag(new_val));
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Write(FLAG_SF, SignFlag(new_val));
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Write(FLAG_OF, new_of);
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return memory;
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}
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template <typename D, typename S1, typename S2>
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DEF_SEM(SHL, D dst, S1 src1, S2 src2) {
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auto val = Read(src1);
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auto shift = Read(src2);
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auto long_mask = Literal<S1>(0x3F);
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auto short_mask = Literal<S1>(0x1F);
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auto op_size = BitSizeOf(src1);
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auto shift_mask = Select(UCmpEq(op_size, 64), long_mask, short_mask);
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auto masked_shift = UAnd(shift, shift_mask);
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if (UCmpEq(masked_shift, 0)) {
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WriteZExt(dst, val);
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return memory; // No flags affected.
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}
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auto new_val = val;
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auto new_of = false;
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auto new_cf = false;
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if (UCmpEq(masked_shift, 1)) {
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auto res = UShl(val, 1);
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auto msb = SignFlag(val);
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auto new_msb = SignFlag(res);
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new_of = BXor(msb, new_msb);
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new_cf = msb;
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new_val = res;
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} else if (UCmpLt(masked_shift, op_size)) {
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auto res = UShl(val, USub(masked_shift, 1));
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auto msb = SignFlag(res);
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new_of = BUndefined(); // Undefined, hard to understand possible values.
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new_cf = msb;
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new_val = UShl(res, 1);
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} else {
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new_of = 1; // Undefined, probably 1.
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new_cf = 0; // Undefined, probably 0.
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new_val = 0;
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}
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WriteZExt(dst, new_val);
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Write(FLAG_CF, new_cf);
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Write(FLAG_PF, ParityFlag(new_val));
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Write(FLAG_AF, false); // Undefined, experimentally 0.
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Write(FLAG_ZF, ZeroFlag(new_val));
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Write(FLAG_SF, SignFlag(new_val));
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Write(FLAG_OF, new_of);
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return memory;
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}
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} // namespace
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DEF_ISEL(SHR_MEMb_IMMb) = SHR<M8W, M8, I8>;
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DEF_ISEL(SHR_GPR8_IMMb) = SHR<R8W, R8, I8>;
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DEF_ISEL_MnW_Mn_In(SHR_MEMv_IMMb, SHR);
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DEF_ISEL_RnW_Rn_In(SHR_GPRv_IMMb, SHR);
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DEF_ISEL(SHR_MEMb_ONE) = SHR<M8W, M8, I8>;
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DEF_ISEL(SHR_GPR8_ONE) = SHR<R8W, R8, I8>;
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DEF_ISEL_MnW_Mn_In(SHR_MEMv_ONE, SHR);
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DEF_ISEL_RnW_Rn_In(SHR_GPRv_ONE, SHR);
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DEF_ISEL(SHR_MEMb_CL) = SHR<M8W, M8, R8>;
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DEF_ISEL(SHR_GPR8_CL) = SHR<R8W, R8, R8>;
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DEF_ISEL_MnW_Mn_Rn(SHR_MEMv_CL, SHR);
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DEF_ISEL_RnW_Rn_Rn(SHR_GPRv_CL, SHR);
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DEF_ISEL(SAR_MEMb_IMMb) = SAR<M8W, M8, I8>;
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DEF_ISEL(SAR_GPR8_IMMb) = SAR<R8W, R8, I8>;
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DEF_ISEL_MnW_Mn_In(SAR_MEMv_IMMb, SAR);
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DEF_ISEL_RnW_Rn_In(SAR_GPRv_IMMb, SAR);
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DEF_ISEL(SAR_MEMb_ONE) = SAR<M8W, M8, I8>;
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DEF_ISEL(SAR_GPR8_ONE) = SAR<R8W, R8, I8>;
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DEF_ISEL_MnW_Mn_In(SAR_MEMv_ONE, SAR);
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DEF_ISEL_RnW_Rn_In(SAR_GPRv_ONE, SAR);
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DEF_ISEL(SAR_MEMb_CL) = SAR<M8W, M8, R8>;
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DEF_ISEL(SAR_GPR8_CL) = SAR<R8W, R8, R8>;
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DEF_ISEL_MnW_Mn_Rn(SAR_MEMv_CL, SAR);
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DEF_ISEL_RnW_Rn_Rn(SAR_GPRv_CL, SAR);
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DEF_ISEL(SHL_MEMb_IMMb_C0r4) = SHL<M8W, M8, I8>;
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DEF_ISEL(SHL_GPR8_IMMb_C0r4) = SHL<R8W, R8, I8>;
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DEF_ISEL(SHL_MEMb_IMMb_C0r6) = SHL<M8W, M8, I8>;
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DEF_ISEL(SHL_GPR8_IMMb_C0r6) = SHL<R8W, R8, I8>;
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DEF_ISEL_MnW_Mn_In(SHL_MEMv_IMMb_C1r4, SHL);
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DEF_ISEL_RnW_Rn_In(SHL_GPRv_IMMb_C1r4, SHL);
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DEF_ISEL_MnW_Mn_In(SHL_MEMv_IMMb_C1r6, SHL);
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DEF_ISEL_RnW_Rn_In(SHL_GPRv_IMMb_C1r6, SHL);
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DEF_ISEL(SHL_MEMb_ONE_D0r4) = SHL<M8W, M8, I8>;
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DEF_ISEL(SHL_GPR8_ONE_D0r4) = SHL<R8W, R8, I8>;
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DEF_ISEL(SHL_MEMb_ONE_D0r6) = SHL<M8W, M8, I8>;
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DEF_ISEL(SHL_GPR8_ONE_D0r6) = SHL<R8W, R8, I8>;
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DEF_ISEL_MnW_Mn_In(SHL_MEMv_ONE_D1r6, SHL);
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DEF_ISEL_RnW_Rn_In(SHL_GPRv_ONE_D1r6, SHL);
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DEF_ISEL_MnW_Mn_In(SHL_MEMv_ONE_D1r4, SHL);
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DEF_ISEL_RnW_Rn_In(SHL_GPRv_ONE_D1r4, SHL);
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DEF_ISEL(SHL_MEMb_CL_D2r4) = SHL<M8W, M8, R8>;
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DEF_ISEL(SHL_GPR8_CL_D2r4) = SHL<R8W, R8, R8>;
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DEF_ISEL(SHL_MEMb_CL_D2r6) = SHL<M8W, M8, R8>;
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DEF_ISEL(SHL_GPR8_CL_D2r6) = SHL<R8W, R8, R8>;
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DEF_ISEL_MnW_Mn_Rn(SHL_MEMv_CL_D3r4, SHL);
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DEF_ISEL_RnW_Rn_Rn(SHL_GPRv_CL_D3r4, SHL);
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DEF_ISEL_MnW_Mn_Rn(SHL_MEMv_CL_D3r6, SHL);
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DEF_ISEL_RnW_Rn_Rn(SHL_GPRv_CL_D3r6, SHL);
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namespace {
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template <typename T>
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ALWAYS_INLINE static uint8_t SHRDCarryFlag(T val, T count) {
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return UCmpEq(UAnd(UShr(val, USub(count, 1)), 1), 1);
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}
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template <typename D, typename S1, typename S2, typename S3>
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DEF_SEM(SHRD, D dst, S1 src1, S2 src2, S3 src3) {
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auto val1 = Read(src1);
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auto val2 = Read(src2);
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auto shift = Read(src3);
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auto long_mask = Literal<S1>(0x3F);
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auto short_mask = Literal<S1>(0x1F);
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auto op_size = BitSizeOf(src1);
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auto shift_mask = Select(UCmpEq(op_size, 64), long_mask, short_mask);
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auto masked_shift = UAnd(shift, shift_mask);
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if (UCmpEq(masked_shift, 0)) {
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WriteZExt(dst, val1);
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return memory;
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} else if (UCmpLt(op_size, masked_shift)) {
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ClearArithFlags();
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// `dst` is undefined; leave as-is, except w.r.t. zero-
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// extension.
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//
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// TODO(pag): Update `dst` anyway because it may be readable but not
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// writable?
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WriteZExt(dst, val1);
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return memory;
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}
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auto left = UShl(val2, USub(op_size, masked_shift));
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auto right = UShr(val1, masked_shift);
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auto res = UOr(left, right);
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WriteZExt(dst, res);
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Write(FLAG_CF, SHRDCarryFlag(val1, masked_shift));
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Write(FLAG_PF, ParityFlag(res));
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Write(FLAG_AF, BUndefined());
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Write(FLAG_ZF, ZeroFlag(res));
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Write(FLAG_SF, SignFlag(res));
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Write(FLAG_OF, BXor(SignFlag(val1), FLAG_SF));
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// OF undefined for `1 == temp_count`.
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return memory;
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}
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} // namespace
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DEF_ISEL_MnW_Mn_Rn_In(SHRD_MEMv_GPRv_IMMb, SHRD);
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DEF_ISEL_RnW_Rn_Rn_In(SHRD_GPRv_GPRv_IMMb, SHRD);
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DEF_ISEL_MnW_Mn_Rn_Rn(SHRD_MEMv_GPRv_CL, SHRD);
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DEF_ISEL_RnW_Rn_Rn_Rn(SHRD_GPRv_GPRv_CL, SHRD);
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namespace {
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template <typename T>
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ALWAYS_INLINE static uint8_t SHLDCarryFlag(T val, T count) {
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return UCmpEq(UAnd(UShr(val, USub(BitSizeOf(count), count)), 1), 1);
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}
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template <typename D, typename S1, typename S2, typename S3>
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DEF_SEM(SHLD, D dst, S1 src1, S2 src2, S3 src3) {
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auto val1 = Read(src1);
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auto val2 = Read(src2);
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auto shift = Read(src3);
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auto long_mask = Literal<S1>(0x3F);
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auto short_mask = Literal<S1>(0x1F);
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auto op_size = BitSizeOf(src1);
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auto shift_mask = Select(UCmpEq(op_size, 64), long_mask, short_mask);
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auto masked_shift = UAnd(shift, shift_mask);
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if (UCmpEq(masked_shift, 0)) {
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WriteZExt(dst, val1);
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return memory;
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} else if (UCmpLt(op_size, masked_shift)) {
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ClearArithFlags();
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// `dst` is undefined; leave as-is, except w.r.t
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// zero-extension.
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//
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// TODO(pag): Update `dst` anyway because it may be readable but not
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// writable?
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WriteZExt(dst, val1);
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return memory;
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}
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auto left = UShl(val1, masked_shift);
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auto right = UShr(val2, USub(op_size, masked_shift));
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auto res = UOr(left, right);
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WriteZExt(dst, res);
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Write(FLAG_CF, SHLDCarryFlag(val1, masked_shift));
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Write(FLAG_PF, ParityFlag(res));
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Write(FLAG_AF, BUndefined());
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Write(FLAG_ZF, ZeroFlag(res));
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Write(FLAG_SF, SignFlag(res));
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Write(FLAG_OF, BXor(SignFlag(val1), FLAG_SF));
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// OF undefined for `1 == temp_count`.
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return memory;
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}
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} // namespace
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DEF_ISEL_MnW_Mn_Rn_In(SHLD_MEMv_GPRv_IMMb, SHLD);
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DEF_ISEL_RnW_Rn_Rn_In(SHLD_GPRv_GPRv_IMMb, SHLD);
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DEF_ISEL_MnW_Mn_Rn_Rn(SHLD_MEMv_GPRv_CL, SHLD);
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DEF_ISEL_RnW_Rn_Rn_Rn(SHLD_GPRv_GPRv_CL, SHLD);
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namespace {
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template <typename D>
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DEF_SEM(PSLLDQ, D dst, V128 src1, I8 src2) {
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uint8v16_t src1_vec = UReadV8(src1);
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uint8v16_t dst_vec = {};
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size_t shift_amount = std::min<size_t>(ZExtTo<size_t>(Read(src2)), 16);
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_Pragma("unroll") for (size_t i = 0; i < 16; ++i) {
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if (i < (16 - shift_amount)) {
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dst_vec = UInsertV8(dst_vec, i + shift_amount, UExtractV8(src1_vec, i));
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}
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}
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UWriteV8(dst, dst_vec);
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return memory;
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}
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#if HAS_FEATURE_AVX
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template <typename D>
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DEF_SEM(VPSLLDQ, D dst, V256 src1, I8 src2) {
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uint8v32_t src1_vec = UReadV8(src1);
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uint8v32_t dst_vec = {};
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size_t shift_amount = std::min<size_t>(ZExtTo<size_t>(Read(src2)), 16);
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_Pragma("unroll") for (size_t i = 0, j = 16; i < 16; ++i, ++j) {
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if (i < (16 - shift_amount)) {
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dst_vec = UInsertV8(dst_vec, i + shift_amount, UExtractV8(src1_vec, i));
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dst_vec = UInsertV8(dst_vec, j + shift_amount, UExtractV8(src1_vec, j));
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}
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}
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UWriteV8(dst, dst_vec);
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return memory;
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}
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#endif // HAS_FEATURE_AVX
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} // namespace
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DEF_ISEL(PSLLDQ_XMMdq_IMMb) = PSLLDQ<V128W>;
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IF_AVX(DEF_ISEL(VPSLLDQ_XMMdq_XMMdq_IMMb) = PSLLDQ<VV128W>;)
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IF_AVX(DEF_ISEL(VPSLLDQ_YMMqq_YMMqq_IMMb) = VPSLLDQ<VV256W>;)
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/*
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3749 VPSLLDQ VPSLLDQ_XMMu8_XMMu8_IMM8_AVX512 AVX512 AVX512EVEX AVX512BW_128 ATTRIBUTES:
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3750 VPSLLDQ VPSLLDQ_XMMu8_MEMu8_IMM8_AVX512 AVX512 AVX512EVEX AVX512BW_128 ATTRIBUTES: DISP8_FULLMEM
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3751 VPSLLDQ VPSLLDQ_YMMu8_YMMu8_IMM8_AVX512 AVX512 AVX512EVEX AVX512BW_256 ATTRIBUTES:
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3752 VPSLLDQ VPSLLDQ_YMMu8_MEMu8_IMM8_AVX512 AVX512 AVX512EVEX AVX512BW_256 ATTRIBUTES: DISP8_FULLMEM
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3753 VPSLLDQ VPSLLDQ_ZMMu8_ZMMu8_IMM8_AVX512 AVX512 AVX512EVEX AVX512BW_512 ATTRIBUTES:
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3754 VPSLLDQ VPSLLDQ_ZMMu8_MEMu8_IMM8_AVX512 AVX512 AVX512EVEX AVX512BW_512 ATTRIBUTES: DISP8_FULLMEM
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*/
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