mirror of
https://github.com/lifting-bits/remill
synced 2026-06-21 13:56:07 +00:00
Peter Goodman
99df2e19d4
* Running clang-format on files with some additional custom scripts for my style * Fix missing unique_ptr in remill/BC/Optimizer.h * Fixes and selective disabling of clang-format
281 lines
8.6 KiB
C++
281 lines
8.6 KiB
C++
/*
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* Copyright (c) 2017 Trail of Bits, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#define MAKE_STOS(name, type, read_sel) \
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namespace { \
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DEF_SEM(Do##name) { \
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const addr_t addr = Read(REG_XDI); \
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const addr_t num_bytes = sizeof(type); \
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Write(WritePtr<type>(addr _IF_32BIT(REG_ES_BASE)), \
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Read(state.gpr.rax.read_sel)); \
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addr_t next_addr = 0; \
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if (BNot(FLAG_DF)) { \
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next_addr = UAdd(addr, num_bytes); \
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} else { \
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next_addr = USub(addr, num_bytes); \
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} \
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Write(REG_XDI, next_addr); \
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return memory; \
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} \
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} \
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DEF_ISEL(name) = Do##name;
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MAKE_STOS(STOSB, uint8_t, byte.low)
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MAKE_STOS(STOSW, uint16_t, word)
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MAKE_STOS(STOSD, uint32_t, dword)
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IF_64BIT(MAKE_STOS(STOSQ, uint64_t, qword))
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#undef MAKE_STOS
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// TODO(pag): How to handle `addr32` prefixes that make the `SCAS` use `EDI`
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// as the base register of the memory operand instead of `RDI`? This
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// could lead to some problems if `RDI != ZExtend(EDI)`.
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#define MAKE_SCAS(name, type, read_sel) \
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namespace { \
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DEF_SEM(Do##name) { \
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const addr_t addr = Read(REG_XDI); \
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const addr_t num_bytes = sizeof(type); \
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const type lhs = Read(state.gpr.rax.read_sel); \
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const type rhs = Read(ReadPtr<type>(addr _IF_32BIT(REG_ES_BASE))); \
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const type res = USub(lhs, rhs); \
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WriteFlagsAddSub<tag_sub>(state, lhs, rhs, res); \
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addr_t next_addr = 0; \
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if (BNot(FLAG_DF)) { \
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next_addr = UAdd(addr, num_bytes); \
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} else { \
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next_addr = USub(addr, num_bytes); \
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} \
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Write(REG_XDI, next_addr); \
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return memory; \
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} \
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} \
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DEF_ISEL(name) = Do##name;
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MAKE_SCAS(SCASB, uint8_t, byte.low)
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MAKE_SCAS(SCASW, uint16_t, word)
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MAKE_SCAS(SCASD, uint32_t, dword)
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IF_64BIT(MAKE_SCAS(SCASQ, uint64_t, qword))
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#undef MAKE_LODS
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#define MAKE_LODS(name, type, write_sel) \
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namespace { \
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DEF_SEM(Do##name) { \
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const addr_t addr = Read(REG_XSI); \
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const addr_t num_bytes = sizeof(type); \
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WriteZExt(state.gpr.rax.write_sel, \
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Read(ReadPtr<type>(addr _IF_32BIT(REG_DS_BASE)))); \
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addr_t next_addr = 0; \
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if (BNot(FLAG_DF)) { \
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next_addr = UAdd(addr, num_bytes); \
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} else { \
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next_addr = USub(addr, num_bytes); \
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} \
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Write(REG_XSI, next_addr); \
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return memory; \
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} \
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} \
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DEF_ISEL(name) = Do##name;
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MAKE_LODS(LODSB, uint8_t, byte.low)
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MAKE_LODS(LODSW, uint16_t, word)
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MAKE_LODS(LODSD, uint32_t, IF_64BIT_ELSE(qword, dword))
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IF_64BIT(MAKE_LODS(LODSQ, uint64_t, qword))
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#undef MAKE_LODS
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#define MAKE_MOVS(name, type, read_sel) \
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namespace { \
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DEF_SEM(Do##name) { \
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const addr_t src_addr = Read(REG_XSI); \
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const addr_t dst_addr = Read(REG_XDI); \
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const addr_t num_bytes = sizeof(type); \
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Write(WritePtr<type>(dst_addr _IF_32BIT(REG_ES_BASE)), \
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Read(ReadPtr<type>(src_addr _IF_32BIT(REG_DS_BASE)))); \
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addr_t next_dst_addr = 0; \
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addr_t next_src_addr = 0; \
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if (BNot(FLAG_DF)) { \
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next_dst_addr = UAdd(dst_addr, num_bytes); \
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next_src_addr = UAdd(src_addr, num_bytes); \
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} else { \
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next_dst_addr = USub(dst_addr, num_bytes); \
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next_src_addr = USub(src_addr, num_bytes); \
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} \
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Write(REG_XDI, next_dst_addr); \
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Write(REG_XSI, next_src_addr); \
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return memory; \
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} \
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} \
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DEF_ISEL(name) = Do##name;
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MAKE_MOVS(MOVSB, uint8_t, byte.low)
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MAKE_MOVS(MOVSW, uint16_t, word)
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MAKE_MOVS(MOVSD, uint32_t, dword)
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IF_64BIT(MAKE_MOVS(MOVSQ, uint64_t, qword))
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#undef MAKE_CMPS
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#define MAKE_CMPS(name, type) \
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namespace { \
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DEF_SEM(Do##name) { \
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const addr_t src1_addr = Read(REG_XSI); \
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const addr_t src2_addr = Read(REG_XDI); \
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const addr_t num_bytes = sizeof(type); \
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const type lhs = Read(ReadPtr<type>(src1_addr _IF_32BIT(REG_DS_BASE))); \
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const type rhs = Read(ReadPtr<type>(src2_addr _IF_32BIT(REG_ES_BASE))); \
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const type res = USub(lhs, rhs); \
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WriteFlagsAddSub<tag_sub>(state, lhs, rhs, res); \
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addr_t next_src1_addr = 0; \
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addr_t next_src2_addr = 0; \
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if (BNot(FLAG_DF)) { \
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next_src1_addr = UAdd(src1_addr, num_bytes); \
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next_src2_addr = UAdd(src2_addr, num_bytes); \
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} else { \
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next_src1_addr = USub(src1_addr, num_bytes); \
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next_src2_addr = USub(src2_addr, num_bytes); \
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} \
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Write(REG_XDI, next_src2_addr); \
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Write(REG_XSI, next_src1_addr); \
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return memory; \
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} \
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} \
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DEF_ISEL(name) = Do##name;
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MAKE_CMPS(CMPSB, uint8_t)
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MAKE_CMPS(CMPSW, uint16_t)
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MAKE_CMPS(CMPSD, uint32_t)
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IF_64BIT(MAKE_CMPS(CMPSQ, uint64_t))
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#undef MAKE_MOVS
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#define MAKE_REP(base) \
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namespace { \
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DEF_SEM(Do##REP_##base) { \
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auto count_reg = Read(REG_XCX); \
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while (UCmpNeq(count_reg, 0)) { \
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memory = Do##base(memory, state); \
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count_reg = USub(count_reg, 1); \
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Write(REG_XCX, count_reg); \
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} \
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return memory; \
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} \
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} \
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DEF_ISEL(REP_##base) = Do##REP_##base;
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MAKE_REP(LODSB)
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MAKE_REP(LODSW)
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MAKE_REP(LODSD)
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IF_64BIT(MAKE_REP(LODSQ))
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MAKE_REP(MOVSB)
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MAKE_REP(MOVSW)
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MAKE_REP(MOVSD)
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IF_64BIT(MAKE_REP(MOVSQ))
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MAKE_REP(STOSB)
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MAKE_REP(STOSW)
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MAKE_REP(STOSD)
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IF_64BIT(MAKE_REP(STOSQ))
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#undef MAKE_REP
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#define MAKE_REPE(base) \
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namespace { \
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DEF_SEM(Do##REPE_##base) { \
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auto count_reg = Read(REG_XCX); \
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if (UCmpEq(count_reg, 0)) { \
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return memory; \
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} \
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do { \
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memory = Do##base(memory, state); \
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count_reg = USub(count_reg, 1); \
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Write(REG_XCX, count_reg); \
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} while (BAnd(UCmpNeq(count_reg, 0), FLAG_ZF)); \
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return memory; \
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} \
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} \
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DEF_ISEL(REPE_##base) = Do##REPE_##base;
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MAKE_REPE(CMPSB)
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MAKE_REPE(CMPSW)
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MAKE_REPE(CMPSD)
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IF_64BIT(MAKE_REPE(CMPSQ))
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MAKE_REPE(SCASB)
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MAKE_REPE(SCASW)
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MAKE_REPE(SCASD)
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IF_64BIT(MAKE_REPE(SCASQ))
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#undef MAKE_REPE
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#define MAKE_REPNE(base) \
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namespace { \
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DEF_SEM(Do##REPNE_##base) { \
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auto count_reg = Read(REG_XCX); \
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if (UCmpEq(count_reg, 0)) { \
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return memory; \
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} \
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do { \
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memory = Do##base(memory, state); \
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count_reg = USub(count_reg, 1); \
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Write(REG_XCX, count_reg); \
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} while (BAnd(UCmpNeq(count_reg, 0), BNot(FLAG_ZF))); \
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return memory; \
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} \
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} \
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DEF_ISEL(REPNE_##base) = Do##REPNE_##base;
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MAKE_REPNE(CMPSB)
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MAKE_REPNE(CMPSW)
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MAKE_REPNE(CMPSD)
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IF_64BIT(MAKE_REPNE(CMPSQ))
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MAKE_REPNE(SCASB)
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MAKE_REPNE(SCASW)
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MAKE_REPNE(SCASD)
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IF_64BIT(MAKE_REPNE(SCASQ))
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#undef MAKE_REPNE
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/*
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30 OUTSW OUTSW IOSTRINGOP BASE I186 ATTRIBUTES: FIXED_BASE0 NOTSX
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36 OUTSB OUTSB IOSTRINGOP BASE I186 ATTRIBUTES: BYTEOP FIXED_BASE0 NOTSX
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37 OUTSD OUTSD IOSTRINGOP BASE I386 ATTRIBUTES: FIXED_BASE0 NOTSX
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38 OUTSD OUTSD IOSTRINGOP BASE I386 ATTRIBUTES: FIXED_BASE0 NOTSX
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907 REP_INSW REP_INSW IOSTRINGOP BASE I186 ATTRIBUTES: FIXED_BASE0 NOTSX REP
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908 REP_INSW REP_INSW IOSTRINGOP BASE I186 ATTRIBUTES: FIXED_BASE0 NOTSX REP
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916 REP_INSB REP_INSB IOSTRINGOP BASE I186 ATTRIBUTES: BYTEOP FIXED_BASE0 NOTSX REP
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917 REP_INSB REP_INSB IOSTRINGOP BASE I186 ATTRIBUTES: BYTEOP FIXED_BASE0 NOTSX REP
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918 REP_INSD REP_INSD IOSTRINGOP BASE I386 ATTRIBUTES: FIXED_BASE0 NOTSX REP
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919 REP_INSD REP_INSD IOSTRINGOP BASE I386 ATTRIBUTES: FIXED_BASE0 NOTSX REP
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920 REP_INSD REP_INSD IOSTRINGOP BASE I386 ATTRIBUTES: FIXED_BASE0 NOTSX REP
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921 REP_INSD REP_INSD IOSTRINGOP BASE I386 ATTRIBUTES: FIXED_BASE0 NOTSX REP
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1118 REP_OUTSW REP_OUTSW IOSTRINGOP BASE I186 ATTRIBUTES: FIXED_BASE0 NOTSX REP
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1119 REP_OUTSW REP_OUTSW IOSTRINGOP BASE I186 ATTRIBUTES: FIXED_BASE0 NOTSX REP
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1129 REP_OUTSB REP_OUTSB IOSTRINGOP BASE I186 ATTRIBUTES: BYTEOP FIXED_BASE0 NOTSX REP
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1130 REP_OUTSB REP_OUTSB IOSTRINGOP BASE I186 ATTRIBUTES: BYTEOP FIXED_BASE0 NOTSX REP
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1135 REP_OUTSD REP_OUTSD IOSTRINGOP BASE I386 ATTRIBUTES: FIXED_BASE0 NOTSX REP
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1136 REP_OUTSD REP_OUTSD IOSTRINGOP BASE I386 ATTRIBUTES: FIXED_BASE0 NOTSX REP
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1137 REP_OUTSD REP_OUTSD IOSTRINGOP BASE I386 ATTRIBUTES: FIXED_BASE0 NOTSX REP
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1138 REP_OUTSD REP_OUTSD IOSTRINGOP BASE I386 ATTRIBUTES: FIXED_BASE0 NOTSX REP
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1326 INSB INSB IOSTRINGOP BASE I186 ATTRIBUTES: BYTEOP FIXED_BASE0 NOTSX
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1328 INSD INSD IOSTRINGOP BASE I386 ATTRIBUTES: FIXED_BASE0 NOTSX
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1329 INSD INSD IOSTRINGOP BASE I386 ATTRIBUTES: FIXED_BASE0 NOTSX
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1366 INSW INSW IOSTRINGOP BASE I186 ATTRIBUTES: FIXED_BASE0 NOTSX
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*/
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