mirror of
https://github.com/lifting-bits/remill
synced 2026-06-21 13:56:07 +00:00
kumarak
88 lines
2.3 KiB
C++
88 lines
2.3 KiB
C++
/*
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* Copyright (c) 2020 Trail of Bits, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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namespace {
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DEF_COND_SEM(ORR, R32W dst, R32 src1, I32 src2, R32W maybe_next_pc_dst) {
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auto value = Read(src2);
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auto result = UOr(Read(src1), value);
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Write(dst, result);
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Write(maybe_next_pc_dst, Read(REG_PC));
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return memory;
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}
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DEF_COND_SEM(ORRS, R32W dst, R32 src1, I32 src2, I8 carry_out,
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R32W maybe_next_pc_dst) {
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auto value = Read(src2);
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auto result = UOr(Read(src1), value);
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Write(dst, result);
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state.sr.n = SignFlag(result);
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state.sr.z = ZeroFlag(result);
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state.sr.c = Read(carry_out);
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// PSTATE.V unchanged
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Write(maybe_next_pc_dst, Read(REG_PC));
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return memory;
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}
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DEF_COND_SEM(BIC, R32W dst, R32 src1, I32 src2, R32W maybe_next_pc_dst) {
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auto value = UNot(Read(src2));
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auto result = UAnd(Read(src1), value);
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Write(dst, result);
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Write(maybe_next_pc_dst, Read(REG_PC));
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return memory;
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}
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DEF_COND_SEM(BICS, R32W dst, R32 src1, I32 src2, I8 carry_out,
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R32W maybe_next_pc_dst) {
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auto value = UNot(Read(src2));
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auto result = UAnd(Read(src1), value);
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Write(dst, result);
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state.sr.n = SignFlag(result);
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state.sr.z = ZeroFlag(result);
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state.sr.c = Read(carry_out);
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// PSTATE.V unchanged
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Write(maybe_next_pc_dst, Read(REG_PC));
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return memory;
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}
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} // namespace
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DEF_ISEL(ORRrr) = ORR;
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DEF_ISEL(ORRSrr) = ORRS;
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DEF_ISEL(MOVrr) = ORR;
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DEF_ISEL(MOVSrr) = ORRS;
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DEF_ISEL(BICrr) = BIC;
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DEF_ISEL(BICSrr) = BICS;
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DEF_ISEL(MVNrr) = BIC;
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DEF_ISEL(MVNSrr) = BICS;
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DEF_ISEL(MOVW) = ORR;
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namespace {
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DEF_COND_SEM(MOVT, R32W dst, R32 src1, R32 src2) {
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auto value = ZExt(Trunc(Read(src1)));
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auto result = UOr(UShl(Read(src2), 16), value);
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Write(dst, result);
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return memory;
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}
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} // namespace
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DEF_ISEL(MOVT) = MOVT;
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