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e1bdbdba9e475ef9894404bb0b8f95d4a6aa30b9
lifting-bits-remill/remill/Arch/X86/Semantics/CONVERT.cpp
T
Peter Goodman e1bdbdba9e Alessandro/refactor/llvmmultiversion cmake (#111) 
* Change copyright notice in all the places. Trying to get cmake to download all the things

* CMake refactor

* Added the lib repository installer

* Fixed a couple of paths in library repository scripts

* Spelling and a missing .gitignore file.

* The google test library was not correctly linked

* Removed the pre-compiled XED library

* Removed unused files; fixed the INSTALL directives. Added automatic protobuf generation.

* Added a package generator script for ArchLinux

* Merged in Alessandro's cmake magic

* Cleanups, compatibility changes

* CMake cleanup.

 o Removed the cmake folder as it is no longer used.
 o Removed the library_repository_installer directory and
   replaced it with a submodule to the newly introduced
   cxx_common repository.
 o Added the 'use_remill_semantics' branch of mcsema as a
   submodule under tools/cmake.
 o Updated the README instructions (added --recursive to the
   git clone command).

Warning: the mcsema submodule is pointing to my fork of the
repository!

* CMake: avoid re-defining the C/CXX/ASM compiler.

This will prevent CMake from looping forever when using submodules.

* The tools/mcsema submodule now points to the official repository.

* mcsema submodule update

* Updated the mcsema git submodule to track the newest changes.

* Various CMake fixes (see details).

 o External include headers were not correctly marked
   as SYSTEM. This caused them to output warnings and
   break the build.
 o The PROJECT_SOURCE CMake variable has been replaced
   with CMAKE_SOURCE_DIR.
 o Updated the mcsema submodule to point to the latest
   CMake fixes.

* Getting closer to having the test case runner work again without using the CFG protobufs.

* Trying to make things use ubuntu clang/llvm packages

* Update to the mcsema submodule.

* Minor changes for llvm version compatibility

* Test cases should run now. Had to compile the lifted testcases to a .S file, as with the .bc file, they were being optimized away.. I think. The compilation to assembly seems unusually slow, though.

* Minor change

* Some stuff for llvm 4.0 support

* Remove mcsema sub-module

* Remove cxx-common submodule

* First steps toward getting travis working again

* Attempt at getting travis working again

* Using https for cloning instead of ssh

* Minor build script update

* Added ISEL_ prefix to isels to make it easier for ForEachISel to find them. Commented out the defer_inlining intrinsics.

* Changes related to mcsema2

* Simplify runtime targets generation. (#110)

* CMake refactor: Added a new language 'BC' for the bitcode (see details).

The language is used to generate the runtimes used by the architecture
modules. The required executables (clang++ and llvm-link) are
automatically detected in the same way as other compilers are.

A new CMake function has been added and it can be used to easily
generate runtime targets in a way similar to add_executable:

    add_runtime(<name> SOURCE <source list> ADDRESS_SIZE <n>
        DEFINITIONS <definition list>)

Additionally, all files ending with the *.bcpp extensions will
automatically invoke the bitcode compiler when listed in an
active target.

This should open support for parallel compilation! You just have to
list all your .cpp files when calling add_runtime.

* CMake: Fixes to the BC language handler.

* CMake/BC: Use '.bo' for object files. X86 runtime: Add -g/-O flags.
2017-05-15 13:00:33 -04:00

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/*
* Copyright (c) 2017 Trail of Bits, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef REMILL_ARCH_X86_SEMANTICS_CONVERT_H_
#define REMILL_ARCH_X86_SEMANTICS_CONVERT_H_
namespace {
DEF_SEM(CBW_AL) {
Write(REG_AX, Unsigned(SExt(REG_AL)));
return memory;
}
// Note: Need to write to the whole register so that high bits of RAX are
// cleared even though the write is to EAX.
DEF_SEM(CWDE_AX) {
WriteZExt(REG_XAX, SExt(REG_AX));
return memory;
}
#if 64 == ADDRESS_SIZE_BITS
DEF_SEM(CDQE_EAX) {
WriteZExt(REG_RAX, SExt(REG_EAX));
return memory;
}
#endif
DEF_SEM(CWD_AX) {
Write(REG_DX, Trunc(UShr(Unsigned(SExt(REG_AX)), 16_u32)));
return memory;
}
// Note: Need to write to the whole register so that high bits of RDX are
// cleared even though the write is to EDX.
DEF_SEM(CDQ_EAX) {
WriteZExt(REG_XDX, Trunc(UShr(Unsigned(SExt(REG_EAX)), 32_u64)));
return memory;
}
#if 64 == ADDRESS_SIZE_BITS
DEF_SEM(CQO_RAX) {
Write(REG_RDX, UNot(USub(UShr(REG_RAX, 63_u64), 1_u64)));
return memory;
}
#endif
} // namespace
DEF_ISEL(CBW) = CBW_AL;
DEF_ISEL(CWDE) = CWDE_AX;
IF_64BIT(DEF_ISEL(CDQE) = CDQE_EAX;)
DEF_ISEL(CWD) = CWD_AX;
DEF_ISEL(CDQ) = CDQ_EAX;
IF_64BIT(DEF_ISEL(CQO) = CQO_RAX;)
namespace {
template <typename S>
DEF_SEM(CVTPI2PD, V128W dst, S src) {
auto src_vec = UReadV32(src);
auto a = Float64(SExtractV32(src_vec, 0));
auto b = Float64(SExtractV32(src_vec, 1));
FWriteV64(dst, FInsertV64(FInsertV64(FReadV64(dst), 0, a), 1, b));
return memory;
}
} // namespace
DEF_ISEL(CVTPI2PD_XMMpd_MEMq) = CVTPI2PD<MV64>;
DEF_ISEL(CVTPI2PD_XMMpd_MMXq) = CVTPI2PD<V64>;
namespace {
template <typename S>
DEF_SEM(CVTPI2PS, V128W dst, S src) {
auto src_vec = UReadV32(src);
auto a = Float32(SExtractV32(src_vec, 0));
auto b = Float32(SExtractV32(src_vec, 1));
FWriteV32(dst, FInsertV32(FInsertV32(FReadV32(dst), 0, a), 1, b));
return memory;
}
} // namespace
DEF_ISEL(CVTPI2PS_XMMq_MEMq) = CVTPI2PS<MV64>;
DEF_ISEL(CVTPI2PS_XMMq_MMXq) = CVTPI2PS<V64>;
namespace {
template <typename D, typename S1, size_t num_to_convert>
DEF_SEM(CVTDQ2PD, D dst, S1 src) {
auto src_vec = SReadV32(src);
auto dst_vec = FClearV64(FReadV64(dst));
_Pragma("unroll")
for (size_t i = 0; i < num_to_convert; ++i) {
auto entry = Float64(SExtractV32(src_vec, i));
dst_vec = FInsertV64(dst_vec, i, entry);
}
FWriteV64(dst, dst_vec);
return memory;
}
typedef float32_t (*FloatConv32)(float32_t);
typedef float64_t (*FloatConv64)(float64_t);
} // namespace
DEF_ISEL(CVTDQ2PD_XMMpd_MEMq) = CVTDQ2PD<V128W, MV64, 2>;
DEF_ISEL(CVTDQ2PD_XMMpd_XMMq) = CVTDQ2PD<V128W, V128, 2>;
IF_AVX(DEF_ISEL(VCVTDQ2PD_XMMdq_MEMq) = CVTDQ2PD<VV128W, MV64, 2>;)
IF_AVX(DEF_ISEL(VCVTDQ2PD_XMMdq_XMMq) = CVTDQ2PD<VV128W, V128, 2>;)
IF_AVX(DEF_ISEL(VCVTDQ2PD_YMMqq_MEMdq) = CVTDQ2PD<VV128W, MV128, 4>;)
IF_AVX(DEF_ISEL(VCVTDQ2PD_YMMqq_XMMdq) = CVTDQ2PD<VV128W, V128, 4>;)
namespace {
template <typename D, typename S1, size_t num_to_convert>
DEF_SEM(CVTDQ2PS, D dst, S1 src) {
auto src_vec = SReadV32(src);
auto dst_vec = FClearV32(FReadV32(dst));
_Pragma("unroll")
for (size_t i = 0; i < num_to_convert; ++i) {
auto entry = Float32(SExtractV32(src_vec, i));
dst_vec = FInsertV32(dst_vec, i, entry);
}
FWriteV32(dst, dst_vec);
return memory;
}
} // namespace
DEF_ISEL(CVTDQ2PS_XMMps_MEMdq) = CVTDQ2PS<V128W, MV128, 4>;
DEF_ISEL(CVTDQ2PS_XMMps_XMMdq) = CVTDQ2PS<V128W, V128, 4>;
IF_AVX(DEF_ISEL(VCVTDQ2PS_XMMdq_MEMdq) = CVTDQ2PS<VV128W, MV128, 4>;)
IF_AVX(DEF_ISEL(VCVTDQ2PS_XMMdq_XMMdq) = CVTDQ2PS<VV128W, V128, 4>;)
IF_AVX(DEF_ISEL(VCVTDQ2PS_YMMqq_MEMqq) = CVTDQ2PS<VV256W, MV256, 8>;)
IF_AVX(DEF_ISEL(VCVTDQ2PS_YMMqq_YMMqq) = CVTDQ2PS<VV256W, VV256, 8>;)
namespace {
template <typename D, typename S1, size_t num_to_convert,
FloatConv64 FRound=FRoundUsingMode64>
DEF_SEM(CVTPD2DQ, D dst, S1 src) {
auto src_vec = FReadV64(src);
auto dst_vec = SClearV32(SReadV32(dst));
_Pragma("unroll")
for (size_t i = 0; i < num_to_convert; ++i) {
float64_t rounded_elem = FRound(FExtractV64(src_vec, i));
auto entry = Float64ToInt32(rounded_elem);
dst_vec = SInsertV32(dst_vec, i, entry);
}
SWriteV32(dst, dst_vec);
return memory;
}
} // namespace
DEF_ISEL(CVTPD2DQ_XMMdq_MEMpd) = CVTPD2DQ<V128W, MV128, 2>;
DEF_ISEL(CVTPD2DQ_XMMdq_XMMpd) = CVTPD2DQ<V128W, V128, 2>;
IF_AVX(DEF_ISEL(VCVTPD2DQ_XMMdq_MEMdq) = CVTPD2DQ<VV128W, MV128, 2>;)
IF_AVX(DEF_ISEL(VCVTPD2DQ_XMMdq_XMMdq) = CVTPD2DQ<VV128W, V128, 2>;)
IF_AVX(DEF_ISEL(VCVTPD2DQ_XMMdq_MEMqq) = CVTPD2DQ<VV128W, MV256, 4>;)
IF_AVX(DEF_ISEL(VCVTPD2DQ_XMMdq_YMMqq) = CVTPD2DQ<VV128W, V256, 4>;)
DEF_ISEL(CVTTPD2DQ_XMMdq_MEMpd) = CVTPD2DQ<V128W, MV128, 2, FTruncTowardZero64>;
DEF_ISEL(CVTTPD2DQ_XMMdq_XMMpd) = CVTPD2DQ<V128W, V128, 2, FTruncTowardZero64>;
IF_AVX(DEF_ISEL(VCVTTPD2DQ_XMMdq_MEMdq) = CVTPD2DQ<VV128W, MV128, 2, FTruncTowardZero64>;)
IF_AVX(DEF_ISEL(VCVTTPD2DQ_XMMdq_XMMdq) = CVTPD2DQ<VV128W, V128, 2, FTruncTowardZero64>;)
IF_AVX(DEF_ISEL(VCVTTPD2DQ_XMMdq_MEMqq) = CVTPD2DQ<VV128W, MV256, 4, FTruncTowardZero64>;)
IF_AVX(DEF_ISEL(VCVTTPD2DQ_XMMdq_YMMqq) = CVTPD2DQ<VV128W, V256, 4, FTruncTowardZero64>;)
namespace {
template <typename D, typename S1, size_t num_to_convert,
FloatConv32 FRound=FRoundUsingMode32>
DEF_SEM(CVTPS2DQ, D dst, S1 src) {
auto src_vec = FReadV32(src);
auto dst_vec = SClearV32(SReadV32(dst));
_Pragma("unroll")
for (size_t i = 0; i < num_to_convert; ++i) {
float32_t rounded_elem = FRound(FExtractV32(src_vec, i));
dst_vec = SInsertV32(dst_vec, i, Float32ToInt32(rounded_elem));
}
SWriteV32(dst, dst_vec);
return memory;
}
} // namespace
DEF_ISEL(CVTPS2DQ_XMMdq_MEMps) = CVTPS2DQ<V128W, MV128, 4>;
DEF_ISEL(CVTPS2DQ_XMMdq_XMMps) = CVTPS2DQ<V128W, V128, 4>;
IF_AVX(DEF_ISEL(VCVTPS2DQ_XMMdq_MEMdq) = CVTPS2DQ<VV128W, MV128, 4>;)
IF_AVX(DEF_ISEL(VCVTPS2DQ_XMMdq_XMMdq) = CVTPS2DQ<VV128W, V128, 4>;)
IF_AVX(DEF_ISEL(VCVTPS2DQ_YMMqq_MEMqq) = CVTPS2DQ<VV256W, MV256, 8>;)
IF_AVX(DEF_ISEL(VCVTPS2DQ_YMMqq_YMMqq) = CVTPS2DQ<VV256W, V256, 8>;)
DEF_ISEL(CVTTPS2DQ_XMMdq_MEMps) = CVTPS2DQ<V128W, MV128, 4, FTruncTowardZero32>;
DEF_ISEL(CVTTPS2DQ_XMMdq_XMMps) = CVTPS2DQ<V128W, V128, 4, FTruncTowardZero32>;
IF_AVX(DEF_ISEL(VCVTTPS2DQ_XMMdq_MEMdq) = CVTPS2DQ<VV128W, MV128, 4, FTruncTowardZero32>;)
IF_AVX(DEF_ISEL(VCVTTPS2DQ_XMMdq_XMMdq) = CVTPS2DQ<VV128W, V128, 4, FTruncTowardZero32>;)
IF_AVX(DEF_ISEL(VCVTTPS2DQ_YMMqq_MEMqq) = CVTPS2DQ<VV256W, MV256, 8, FTruncTowardZero32>;)
IF_AVX(DEF_ISEL(VCVTTPS2DQ_YMMqq_YMMqq) = CVTPS2DQ<VV256W, V256, 8, FTruncTowardZero32>;)
namespace {
template <typename S, FloatConv32 FRound=FRoundUsingMode32>
DEF_SEM(CVTSS2SI_32, R32W dst, S src) {
float32_t rounded_val = FRound(FExtractV32(FReadV32(src), 0));
WriteZExt(dst, Unsigned(Float32ToInt32(rounded_val)));
return memory;
}
#if 64 == ADDRESS_SIZE_BITS
template <typename S, FloatConv32 FRound=FRoundUsingMode32>
DEF_SEM(CVTSS2SI_64, R64W dst, S src) {
float32_t rounded_val = FRound(FExtractV32(FReadV32(src), 0));
Write(dst, Unsigned(Float32ToInt64(rounded_val)));
return memory;
}
#endif // ADDRESS_SIZE_BITS
} // namespace
DEF_ISEL(CVTSS2SI_GPR32d_MEMss) = CVTSS2SI_32<MV32>;
DEF_ISEL(CVTSS2SI_GPR32d_XMMss) = CVTSS2SI_32<V128>;
IF_64BIT(DEF_ISEL(CVTSS2SI_GPR64q_MEMss) = CVTSS2SI_64<MV32>;)
IF_64BIT(DEF_ISEL(CVTSS2SI_GPR64q_XMMss) = CVTSS2SI_64<V128>;)
IF_AVX(DEF_ISEL(VCVTSS2SI_GPR32d_MEMd) = CVTSS2SI_32<MV32>;)
IF_AVX(DEF_ISEL(VCVTSS2SI_GPR32d_XMMd) = CVTSS2SI_32<V128>;)
IF_AVX(IF_64BIT(DEF_ISEL(VCVTSS2SI_GPR64q_MEMd) = CVTSS2SI_64<MV32>;))
IF_AVX(IF_64BIT(DEF_ISEL(VCVTSS2SI_GPR64q_XMMd) = CVTSS2SI_64<V128>;))
DEF_ISEL(CVTTSS2SI_GPR32d_MEMss) = CVTSS2SI_32<MV32, FTruncTowardZero32>;
DEF_ISEL(CVTTSS2SI_GPR32d_XMMss) = CVTSS2SI_32<V128, FTruncTowardZero32>;
IF_64BIT(DEF_ISEL(CVTTSS2SI_GPR64q_MEMss) = CVTSS2SI_64<MV32, FTruncTowardZero32>;)
IF_64BIT(DEF_ISEL(CVTTSS2SI_GPR64q_XMMss) = CVTSS2SI_64<V128, FTruncTowardZero32>;)
IF_AVX(DEF_ISEL(VCVTTSS2SI_GPR32d_MEMd) = CVTSS2SI_32<MV32, FTruncTowardZero32>;)
IF_AVX(DEF_ISEL(VCVTTSS2SI_GPR32d_XMMd) = CVTSS2SI_32<V128, FTruncTowardZero32>;)
IF_AVX(IF_64BIT(DEF_ISEL(VCVTTSS2SI_GPR64q_MEMd) =CVTSS2SI_64<MV32, FTruncTowardZero32>;))
IF_AVX(IF_64BIT(DEF_ISEL(VCVTTSS2SI_GPR64q_XMMd) =CVTSS2SI_64<V128, FTruncTowardZero32>;))
namespace {
template <typename S, FloatConv64 FRound=FRoundUsingMode64>
DEF_SEM(CVTSD2SI_32, R32W dst, S src) {
auto rounded_val = FRound(FExtractV64(FReadV64(src), 0));
WriteZExt(dst, Unsigned(Float64ToInt32(rounded_val)));
return memory;
}
#if 64 == ADDRESS_SIZE_BITS
template <typename S, FloatConv64 FRound=FRoundUsingMode64>
DEF_SEM(CVTSD2SI_64, R64W dst, S src) {
auto rounded_val = FRound(FExtractV64(FReadV64(src), 0));
Write(dst, Unsigned(Float64ToInt64(rounded_val)));
return memory;
}
#endif // ADDRESS_SIZE_BITS
} // namespace
DEF_ISEL(CVTSD2SI_GPR32d_MEMsd) = CVTSD2SI_32<MV64>;
DEF_ISEL(CVTSD2SI_GPR32d_XMMsd) = CVTSD2SI_32<V128>;
IF_AVX(DEF_ISEL(VCVTSD2SI_GPR32d_MEMq) = CVTSD2SI_32<MV64>;)
IF_AVX(DEF_ISEL(VCVTSD2SI_GPR32d_XMMq) = CVTSD2SI_32<V128>;)
IF_64BIT(DEF_ISEL(CVTSD2SI_GPR64q_MEMsd) = CVTSD2SI_64<MV64>;)
IF_64BIT(DEF_ISEL(CVTSD2SI_GPR64q_XMMsd) = CVTSD2SI_64<V128>;)
IF_AVX(IF_64BIT(DEF_ISEL(VCVTSD2SI_GPR64q_MEMq) = CVTSD2SI_64<MV64>;))
IF_AVX(IF_64BIT(DEF_ISEL(VCVTSD2SI_GPR64q_XMMq) = CVTSD2SI_64<V128>;))
DEF_ISEL(CVTTSD2SI_GPR32d_MEMsd) = CVTSD2SI_32<MV64, FTruncTowardZero64>;
DEF_ISEL(CVTTSD2SI_GPR32d_XMMsd) = CVTSD2SI_32<V128, FTruncTowardZero64>;
IF_AVX(DEF_ISEL(VCVTTSD2SI_GPR32d_MEMq) = CVTSD2SI_32<MV64, FTruncTowardZero64>;)
IF_AVX(DEF_ISEL(VCVTTSD2SI_GPR32d_XMMq) = CVTSD2SI_32<V128, FTruncTowardZero64>;)
IF_64BIT(DEF_ISEL(CVTTSD2SI_GPR64q_MEMsd) = CVTSD2SI_64<MV64, FTruncTowardZero64>;)
IF_64BIT(DEF_ISEL(CVTTSD2SI_GPR64q_XMMsd) = CVTSD2SI_64<V128, FTruncTowardZero64>;)
IF_AVX(IF_64BIT(DEF_ISEL(VCVTTSD2SI_GPR64q_MEMq) =CVTSD2SI_64<MV64, FTruncTowardZero64>;))
IF_AVX(IF_64BIT(DEF_ISEL(VCVTTSD2SI_GPR64q_XMMq) =CVTSD2SI_64<V128, FTruncTowardZero64>;))
namespace {
template <typename S1>
DEF_SEM(CVTSD2SS, V128W dst, S1 src) {
FWriteV32(dst, FInsertV32(
FReadV32(dst), 0, Float32(FExtractV64(FReadV64(src), 0))));
return memory;
}
#if HAS_FEATURE_AVX
template <typename S2>
DEF_SEM(VCVTSD2SS, VV128W dst, V128W src1, S2 src2) {
auto src1_vec = FReadV32(src1);
auto src2_vec = FReadV64(src2);
auto dst_vec = FInsertV32(src1_vec, 0, Float32(FExtractV64(src2_vec, 0)));
FWriteV32(dst, dst_vec);
return memory;
}
#endif // HAS_FEATURE_AVX
} // namespace
DEF_ISEL(CVTSD2SS_XMMss_MEMsd) = CVTSD2SS<MV64>;
DEF_ISEL(CVTSD2SS_XMMss_XMMsd) = CVTSD2SS<V128>;
IF_AVX(DEF_ISEL(VCVTSD2SS_XMMdq_XMMdq_MEMq) = VCVTSD2SS<MV64>;)
IF_AVX(DEF_ISEL(VCVTSD2SS_XMMdq_XMMdq_XMMq) = VCVTSD2SS<V128>;)
namespace {
template <typename S2>
DEF_SEM(CVTSI2SS, V128W dst_src1, S2 src2) {
auto src1_vec = FReadV32(dst_src1);
auto conv_val = Float32(Signed(Read(src2)));
FWriteV32(dst_src1, FInsertV32(src1_vec, 0, conv_val));
return memory;
}
template <typename S2>
DEF_SEM(CVTSI2SD, V128W dst_src1, S2 src2) {
auto src1_vec = FReadV64(dst_src1);
auto conv_val = Float64(Signed(Read(src2)));
FWriteV64(dst_src1, FInsertV64(src1_vec, 0, conv_val));
return memory;
}
template <typename S2>
DEF_SEM(CVTSS2SD, VV128W dst_src1, S2 src2) {
auto src1_vec = FReadV64(dst_src1);
auto src2_vec = FReadV32(src2);
auto conv_val = Float64(FExtractV32(src2_vec, 0));
FWriteV64(dst_src1, FInsertV64(src1_vec, 0, conv_val));
return memory;
}
#if HAS_FEATURE_AVX
template <typename S2>
DEF_SEM(VCVTSI2SS, VV128W dst, V128 src1, S2 src2) {
auto src1_vec = FReadV32(src1);
auto conv_val = Float32(Signed(Read(src2)));
FWriteV32(dst, FInsertV32(src1_vec, 0, conv_val));
return memory;
}
template <typename S2>
DEF_SEM(VCVTSI2SD, VV128W dst, V128 src1, S2 src2) {
auto src1_vec = FReadV64(src1);
auto conv_val = Float64(Signed(Read(src2)));
FWriteV64(dst, FInsertV64(src1_vec, 0, conv_val));
return memory;
}
template <typename S2>
DEF_SEM(VCVTSS2SD, VV128W dst, V128 src1, S2 src2) {
auto src1_vec = FReadV64(src1);
auto src2_vec = FReadV32(src2);
auto conv_val = Float64(FExtractV32(src2_vec, 0));
FWriteV64(dst, FInsertV64(src1_vec, 0, conv_val));
return memory;
}
#endif // HAS_FEATURE_AVX
} // namespace
DEF_ISEL(CVTSI2SS_XMMss_MEMd) = CVTSI2SS<M32>;
DEF_ISEL(CVTSI2SS_XMMss_GPR32d) = CVTSI2SS<R32>;
IF_64BIT(DEF_ISEL(CVTSI2SS_XMMss_MEMq) = CVTSI2SS<M64>;)
IF_64BIT(DEF_ISEL(CVTSI2SS_XMMss_GPR64q) = CVTSI2SS<R64>;)
IF_AVX(DEF_ISEL(VCVTSI2SS_XMMdq_XMMdq_MEMd) = VCVTSI2SS<M32>;)
IF_AVX(DEF_ISEL(VCVTSI2SS_XMMdq_XMMdq_GPR32d) = VCVTSI2SS<R32>;)
IF_AVX(IF_64BIT(DEF_ISEL(VCVTSI2SS_XMMdq_XMMdq_MEMq) = VCVTSI2SS<M64>;))
IF_AVX(IF_64BIT(DEF_ISEL(VCVTSI2SS_XMMdq_XMMdq_GPR64q) = VCVTSI2SS<R64>;))
DEF_ISEL(CVTSI2SD_XMMsd_MEMd) = CVTSI2SD<M32>;
DEF_ISEL(CVTSI2SD_XMMsd_GPR32d) = CVTSI2SD<R32>;
IF_64BIT(DEF_ISEL(CVTSI2SD_XMMsd_MEMq) = CVTSI2SD<M64>;)
IF_64BIT(DEF_ISEL(CVTSI2SD_XMMsd_GPR64q) = CVTSI2SD<R64>;)
IF_AVX(DEF_ISEL(VCVTSI2SD_XMMdq_XMMdq_MEMd) = VCVTSI2SD<M32>;)
IF_AVX(DEF_ISEL(VCVTSI2SD_XMMdq_XMMdq_GPR32d) = VCVTSI2SD<R32>;)
IF_AVX(IF_64BIT(DEF_ISEL(VCVTSI2SD_XMMdq_XMMdq_MEMq) = VCVTSI2SD<M64>;))
IF_AVX(IF_64BIT(DEF_ISEL(VCVTSI2SD_XMMdq_XMMdq_GPR64q) = VCVTSI2SD<R64>;))
DEF_ISEL(CVTSS2SD_XMMsd_MEMss) = CVTSS2SD<MV32>;
DEF_ISEL(CVTSS2SD_XMMsd_XMMss) = CVTSS2SD<V128>;
IF_AVX(DEF_ISEL(VCVTSS2SD_XMMdq_XMMdq_MEMd) = VCVTSS2SD<MV32>;)
IF_AVX(DEF_ISEL(VCVTSS2SD_XMMdq_XMMdq_XMMd) = VCVTSS2SD<V128>;)
namespace {
template <typename D, typename S1, size_t vec_count>
DEF_SEM(CVTPS2PD, D dst, S1 src) {
auto src_vec = FReadV32(src);
auto dst_vec = FClearV64(FReadV64(dst));
_Pragma("unroll")
for (size_t i = 0; i < vec_count; ++i) {
auto conv_val = Float64(FExtractV32(src_vec, i));
dst_vec = FInsertV64(dst_vec, i, conv_val);
}
FWriteV64(dst, dst_vec);
return memory;
}
template <typename D, typename S1, size_t vec_count>
DEF_SEM(CVTPD2PS, D dst, S1 src) {
auto src_vec = FReadV64(src);
auto dst_vec = FClearV32(FReadV32(dst));
_Pragma("unroll")
for (size_t i = 0; i < vec_count; ++i) {
auto conv_val = Float32(FExtractV64(src_vec, i));
dst_vec = FInsertV32(dst_vec, i, conv_val);
}
FWriteV32(dst, dst_vec);
return memory;
}
} // namespace
DEF_ISEL(CVTPS2PD_XMMpd_MEMq) = CVTPS2PD<V128W, MV64, 2>;
DEF_ISEL(CVTPS2PD_XMMpd_XMMq) = CVTPS2PD<V128W, V128, 2>;
IF_AVX(DEF_ISEL(VCVTPS2PD_XMMdq_MEMq) = CVTPS2PD<VV128W, MV64, 2>;)
IF_AVX(DEF_ISEL(VCVTPS2PD_XMMdq_XMMq) = CVTPS2PD<VV128W, V128, 2>;)
IF_AVX(DEF_ISEL(VCVTPS2PD_YMMqq_MEMdq) = CVTPS2PD<VV256W, MV128, 4>;)
IF_AVX(DEF_ISEL(VCVTPS2PD_YMMqq_XMMdq) = CVTPS2PD<VV256W, V128, 4>;)
DEF_ISEL(CVTPD2PS_XMMps_MEMpd) = CVTPD2PS<V128W, MV128, 2>;
DEF_ISEL(CVTPD2PS_XMMps_XMMpd) = CVTPD2PS<V128W, V128, 2>;
IF_AVX(DEF_ISEL(VCVTPD2PS_XMMdq_MEMdq) = CVTPD2PS<VV128W, MV128, 2>;)
IF_AVX(DEF_ISEL(VCVTPD2PS_XMMdq_XMMdq) = CVTPD2PS<VV128W, V128, 2>;)
IF_AVX(DEF_ISEL(VCVTPD2PS_XMMdq_MEMqq) = CVTPD2PS<VV128W, MV256, 4>;)
IF_AVX(DEF_ISEL(VCVTPD2PS_XMMdq_YMMqq) = CVTPD2PS<VV128W, V256, 4>;)
/*
2194 VCVTPH2PS VCVTPH2PS_XMMdq_MEMq CONVERT F16C F16C ATTRIBUTES: MXCSR
2195 VCVTPH2PS VCVTPH2PS_XMMdq_XMMq CONVERT F16C F16C ATTRIBUTES: MXCSR
2196 VCVTPH2PS VCVTPH2PS_YMMqq_MEMdq CONVERT F16C F16C ATTRIBUTES: MXCSR
2197 VCVTPH2PS VCVTPH2PS_YMMqq_XMMdq CONVERT F16C F16C ATTRIBUTES: MXCSR
3612 VCVTPS2PH VCVTPS2PH_MEMq_XMMdq_IMMb CONVERT F16C F16C ATTRIBUTES: MXCSR
3613 VCVTPS2PH VCVTPS2PH_XMMq_XMMdq_IMMb CONVERT F16C F16C ATTRIBUTES: MXCSR
3614 VCVTPS2PH VCVTPS2PH_MEMdq_YMMqq_IMMb CONVERT F16C F16C ATTRIBUTES: MXCSR
3615 VCVTPS2PH VCVTPS2PH_XMMdq_YMMqq_IMMb CONVERT F16C F16C ATTRIBUTES: MXCSR
3724 VCVTPS2UQQ VCVTPS2UQQ_XMMu64_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: MASKOP_EVEX MXCSR
3725 VCVTPS2UQQ VCVTPS2UQQ_XMMu64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
3726 VCVTPS2UQQ VCVTPS2UQQ_YMMu64_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: MASKOP_EVEX MXCSR
3727 VCVTPS2UQQ VCVTPS2UQQ_YMMu64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
3728 VCVTPS2UQQ VCVTPS2UQQ_ZMMu64_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
3729 VCVTPS2UQQ VCVTPS2UQQ_ZMMu64_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
3730 VCVTPS2UQQ VCVTPS2UQQ_ZMMu64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
3797 VCVTTPD2UQQ VCVTTPD2UQQ_XMMu64_MASKmskw_XMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: MASKOP_EVEX MXCSR
3798 VCVTTPD2UQQ VCVTTPD2UQQ_XMMu64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
3799 VCVTTPD2UQQ VCVTTPD2UQQ_YMMu64_MASKmskw_YMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: MASKOP_EVEX MXCSR
3800 VCVTTPD2UQQ VCVTTPD2UQQ_YMMu64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
3801 VCVTTPD2UQQ VCVTTPD2UQQ_ZMMu64_MASKmskw_ZMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
3802 VCVTTPD2UQQ VCVTTPD2UQQ_ZMMu64_MASKmskw_ZMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
3803 VCVTTPD2UQQ VCVTTPD2UQQ_ZMMu64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
3832 VCVTPH2PS VCVTPH2PS_ZMMf32_MASKmskw_YMMf16_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
3833 VCVTPH2PS VCVTPH2PS_ZMMf32_MASKmskw_YMMf16_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
3834 VCVTPH2PS VCVTPH2PS_ZMMf32_MASKmskw_MEMf16_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: DISP8_HALFMEM MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
3835 VCVTPH2PS VCVTPH2PS_XMMf32_MASKmskw_XMMf16_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
3836 VCVTPH2PS VCVTPH2PS_XMMf32_MASKmskw_MEMf16_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: DISP8_HALFMEM MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
3837 VCVTPH2PS VCVTPH2PS_YMMf32_MASKmskw_XMMf16_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
3838 VCVTPH2PS VCVTPH2PS_YMMf32_MASKmskw_MEMf16_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: DISP8_HALFMEM MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
3873 VCVTTPS2QQ VCVTTPS2QQ_XMMi64_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: MASKOP_EVEX MXCSR
3874 VCVTTPS2QQ VCVTTPS2QQ_XMMi64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
3875 VCVTTPS2QQ VCVTTPS2QQ_YMMi64_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: MASKOP_EVEX MXCSR
3876 VCVTTPS2QQ VCVTTPS2QQ_YMMi64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
3877 VCVTTPS2QQ VCVTTPS2QQ_ZMMi64_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
3878 VCVTTPS2QQ VCVTTPS2QQ_ZMMi64_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
3879 VCVTTPS2QQ VCVTTPS2QQ_ZMMi64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4117 VCVTTPD2UDQ VCVTTPD2UDQ_YMMu32_MASKmskw_ZMMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4118 VCVTTPD2UDQ VCVTTPD2UDQ_YMMu32_MASKmskw_ZMMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4119 VCVTTPD2UDQ VCVTTPD2UDQ_YMMu32_MASKmskw_MEMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4120 VCVTTPD2UDQ VCVTTPD2UDQ_XMMu32_MASKmskw_XMMf64_AVX512_VL128 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
4121 VCVTTPD2UDQ VCVTTPD2UDQ_XMMu32_MASKmskw_MEMf64_AVX512_VL128 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4122 VCVTTPD2UDQ VCVTTPD2UDQ_XMMu32_MASKmskw_YMMf64_AVX512_VL256 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
4123 VCVTTPD2UDQ VCVTTPD2UDQ_XMMu32_MASKmskw_MEMf64_AVX512_VL256 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4185 VCVTPS2QQ VCVTPS2QQ_XMMi64_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: MASKOP_EVEX MXCSR
4186 VCVTPS2QQ VCVTPS2QQ_XMMi64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4187 VCVTPS2QQ VCVTPS2QQ_YMMi64_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: MASKOP_EVEX MXCSR
4188 VCVTPS2QQ VCVTPS2QQ_YMMi64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4189 VCVTPS2QQ VCVTPS2QQ_ZMMi64_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4190 VCVTPS2QQ VCVTPS2QQ_ZMMi64_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4191 VCVTPS2QQ VCVTPS2QQ_ZMMi64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4229 VCVTPD2UDQ VCVTPD2UDQ_YMMu32_MASKmskw_ZMMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4230 VCVTPD2UDQ VCVTPD2UDQ_YMMu32_MASKmskw_ZMMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4231 VCVTPD2UDQ VCVTPD2UDQ_YMMu32_MASKmskw_MEMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4232 VCVTPD2UDQ VCVTPD2UDQ_XMMu32_MASKmskw_XMMf64_AVX512_VL128 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
4233 VCVTPD2UDQ VCVTPD2UDQ_XMMu32_MASKmskw_MEMf64_AVX512_VL128 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4234 VCVTPD2UDQ VCVTPD2UDQ_XMMu32_MASKmskw_YMMf64_AVX512_VL256 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
4235 VCVTPD2UDQ VCVTPD2UDQ_XMMu32_MASKmskw_MEMf64_AVX512_VL256 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4281 VCVTSS2SD VCVTSS2SD_XMMf64_MASKmskw_XMMf32_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MASKOP_EVEX MXCSR SIMD_SCALAR
4282 VCVTSS2SD VCVTSS2SD_XMMf64_MASKmskw_XMMf32_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MASKOP_EVEX MXCSR SIMD_SCALAR
4283 VCVTSS2SD VCVTSS2SD_XMMf64_MASKmskw_XMMf32_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_SCALAR MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR SIMD_SCALAR
4308 VCVTUSI2SS VCVTUSI2SS_XMMf32_XMMf32_GPR32u32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4309 VCVTUSI2SS VCVTUSI2SS_XMMf32_XMMf32_GPR32u32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4310 VCVTUSI2SS VCVTUSI2SS_XMMf32_XMMf32_MEMu32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_READER MXCSR SIMD_SCALAR
4311 VCVTUSI2SS VCVTUSI2SS_XMMf32_XMMf32_GPR64u64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4312 VCVTUSI2SS VCVTUSI2SS_XMMf32_XMMf32_GPR64u64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4313 VCVTUSI2SS VCVTUSI2SS_XMMf32_XMMf32_MEMu64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_READER MXCSR SIMD_SCALAR
4337 VCVTUSI2SD VCVTUSI2SD_XMMf64_XMMf64_GPR32u32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: SIMD_SCALAR
4338 VCVTUSI2SD VCVTUSI2SD_XMMf64_XMMf64_MEMu32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_READER SIMD_SCALAR
4339 VCVTUSI2SD VCVTUSI2SD_XMMf64_XMMf64_GPR64u64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4340 VCVTUSI2SD VCVTUSI2SD_XMMf64_XMMf64_GPR64u64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4341 VCVTUSI2SD VCVTUSI2SD_XMMf64_XMMf64_MEMu64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_READER MXCSR SIMD_SCALAR
4484 VCVTPS2DQ VCVTPS2DQ_ZMMi32_MASKmskw_ZMMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4485 VCVTPS2DQ VCVTPS2DQ_ZMMi32_MASKmskw_ZMMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4486 VCVTPS2DQ VCVTPS2DQ_ZMMi32_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4487 VCVTPS2DQ VCVTPS2DQ_XMMi32_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
4488 VCVTPS2DQ VCVTPS2DQ_XMMi32_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4489 VCVTPS2DQ VCVTPS2DQ_YMMi32_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
4490 VCVTPS2DQ VCVTPS2DQ_YMMi32_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4614 VCVTPD2DQ VCVTPD2DQ_YMMi32_MASKmskw_ZMMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4615 VCVTPD2DQ VCVTPD2DQ_YMMi32_MASKmskw_ZMMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4616 VCVTPD2DQ VCVTPD2DQ_YMMi32_MASKmskw_MEMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4617 VCVTPD2DQ VCVTPD2DQ_XMMi32_MASKmskw_XMMf64_AVX512_VL128 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
4618 VCVTPD2DQ VCVTPD2DQ_XMMi32_MASKmskw_MEMf64_AVX512_VL128 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4619 VCVTPD2DQ VCVTPD2DQ_XMMi32_MASKmskw_YMMf64_AVX512_VL256 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
4620 VCVTPD2DQ VCVTPD2DQ_XMMi32_MASKmskw_MEMf64_AVX512_VL256 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4624 VCVTTSS2SI VCVTTSS2SI_GPR32i32_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4625 VCVTTSS2SI VCVTTSS2SI_GPR32i32_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4626 VCVTTSS2SI VCVTTSS2SI_GPR32i32_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_D MXCSR SIMD_SCALAR
4627 VCVTTSS2SI VCVTTSS2SI_GPR64i64_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4628 VCVTTSS2SI VCVTTSS2SI_GPR64i64_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4629 VCVTTSS2SI VCVTTSS2SI_GPR64i64_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_D MXCSR SIMD_SCALAR
4630 VCVTQQ2PD VCVTQQ2PD_XMMi64_MASKmskw_XMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: MASKOP_EVEX MXCSR
4631 VCVTQQ2PD VCVTQQ2PD_XMMi64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4632 VCVTQQ2PD VCVTQQ2PD_YMMi64_MASKmskw_YMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: MASKOP_EVEX MXCSR
4633 VCVTQQ2PD VCVTQQ2PD_YMMi64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4634 VCVTQQ2PD VCVTQQ2PD_ZMMi64_MASKmskw_ZMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4635 VCVTQQ2PD VCVTQQ2PD_ZMMi64_MASKmskw_ZMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4636 VCVTQQ2PD VCVTQQ2PD_ZMMi64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4645 VCVTQQ2PS VCVTQQ2PS_XMMf32_MASKmskw_XMMu64_AVX512_VL128 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: MASKOP_EVEX MXCSR
4646 VCVTQQ2PS VCVTQQ2PS_XMMf32_MASKmskw_MEMu64_AVX512_VL128 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4647 VCVTQQ2PS VCVTQQ2PS_XMMf32_MASKmskw_YMMu64_AVX512_VL256 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: MASKOP_EVEX MXCSR
4648 VCVTQQ2PS VCVTQQ2PS_XMMf32_MASKmskw_MEMu64_AVX512_VL256 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4649 VCVTQQ2PS VCVTQQ2PS_YMMf32_MASKmskw_ZMMu64_AVX512_VL512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4650 VCVTQQ2PS VCVTQQ2PS_YMMf32_MASKmskw_ZMMu64_AVX512_VL512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4651 VCVTQQ2PS VCVTQQ2PS_YMMf32_MASKmskw_MEMu64_AVX512_VL512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4677 VCVTTPS2UDQ VCVTTPS2UDQ_ZMMu32_MASKmskw_ZMMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4678 VCVTTPS2UDQ VCVTTPS2UDQ_ZMMu32_MASKmskw_ZMMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4679 VCVTTPS2UDQ VCVTTPS2UDQ_ZMMu32_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4680 VCVTTPS2UDQ VCVTTPS2UDQ_XMMu32_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
4681 VCVTTPS2UDQ VCVTTPS2UDQ_XMMu32_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4682 VCVTTPS2UDQ VCVTTPS2UDQ_YMMu32_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
4683 VCVTTPS2UDQ VCVTTPS2UDQ_YMMu32_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4814 VCVTSD2USI VCVTSD2USI_GPR32u32_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4815 VCVTSD2USI VCVTSD2USI_GPR32u32_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4816 VCVTSD2USI VCVTSD2USI_GPR32u32_MEMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_Q MXCSR SIMD_SCALAR
4817 VCVTSD2USI VCVTSD2USI_GPR64u64_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4818 VCVTSD2USI VCVTSD2USI_GPR64u64_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
4819 VCVTSD2USI VCVTSD2USI_GPR64u64_MEMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_Q MXCSR SIMD_SCALAR
4981 VCVTUQQ2PD VCVTUQQ2PD_XMMf64_MASKmskw_XMMu64_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: MASKOP_EVEX MXCSR
4982 VCVTUQQ2PD VCVTUQQ2PD_XMMf64_MASKmskw_MEMu64_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4983 VCVTUQQ2PD VCVTUQQ2PD_YMMf64_MASKmskw_YMMu64_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: MASKOP_EVEX MXCSR
4984 VCVTUQQ2PD VCVTUQQ2PD_YMMf64_MASKmskw_MEMu64_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
4985 VCVTUQQ2PD VCVTUQQ2PD_ZMMf64_MASKmskw_ZMMu64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4986 VCVTUQQ2PD VCVTUQQ2PD_ZMMf64_MASKmskw_ZMMu64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
4987 VCVTUQQ2PD VCVTUQQ2PD_ZMMf64_MASKmskw_MEMu64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5009 VCVTTPS2DQ VCVTTPS2DQ_ZMMi32_MASKmskw_ZMMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
5010 VCVTTPS2DQ VCVTTPS2DQ_ZMMi32_MASKmskw_ZMMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
5011 VCVTTPS2DQ VCVTTPS2DQ_ZMMi32_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5012 VCVTTPS2DQ VCVTTPS2DQ_XMMi32_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
5013 VCVTTPS2DQ VCVTTPS2DQ_XMMi32_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5014 VCVTTPS2DQ VCVTTPS2DQ_YMMi32_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
5015 VCVTTPS2DQ VCVTTPS2DQ_YMMi32_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5028 VCVTUQQ2PS VCVTUQQ2PS_XMMf32_MASKmskw_XMMu64_AVX512_VL128 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: MASKOP_EVEX MXCSR
5029 VCVTUQQ2PS VCVTUQQ2PS_XMMf32_MASKmskw_MEMu64_AVX512_VL128 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5030 VCVTUQQ2PS VCVTUQQ2PS_XMMf32_MASKmskw_YMMu64_AVX512_VL256 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: MASKOP_EVEX MXCSR
5031 VCVTUQQ2PS VCVTUQQ2PS_XMMf32_MASKmskw_MEMu64_AVX512_VL256 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5032 VCVTUQQ2PS VCVTUQQ2PS_YMMf32_MASKmskw_ZMMu64_AVX512_VL512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
5033 VCVTUQQ2PS VCVTUQQ2PS_YMMf32_MASKmskw_ZMMu64_AVX512_VL512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
5034 VCVTUQQ2PS VCVTUQQ2PS_YMMf32_MASKmskw_MEMu64_AVX512_VL512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5070 VCVTSS2SI VCVTSS2SI_GPR32i32_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5071 VCVTSS2SI VCVTSS2SI_GPR32i32_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5072 VCVTSS2SI VCVTSS2SI_GPR32i32_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_D MXCSR SIMD_SCALAR
5073 VCVTSS2SI VCVTSS2SI_GPR64i64_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5074 VCVTSS2SI VCVTSS2SI_GPR64i64_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5075 VCVTSS2SI VCVTSS2SI_GPR64i64_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_D MXCSR SIMD_SCALAR
5276 VCVTTSD2USI VCVTTSD2USI_GPR32u32_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5277 VCVTTSD2USI VCVTTSD2USI_GPR32u32_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5278 VCVTTSD2USI VCVTTSD2USI_GPR32u32_MEMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_Q MXCSR SIMD_SCALAR
5279 VCVTTSD2USI VCVTTSD2USI_GPR64u64_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5280 VCVTTSD2USI VCVTTSD2USI_GPR64u64_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5281 VCVTTSD2USI VCVTTSD2USI_GPR64u64_MEMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_Q MXCSR SIMD_SCALAR
5323 VCVTPD2QQ VCVTPD2QQ_XMMi64_MASKmskw_XMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: MASKOP_EVEX MXCSR
5324 VCVTPD2QQ VCVTPD2QQ_XMMi64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5325 VCVTPD2QQ VCVTPD2QQ_YMMi64_MASKmskw_YMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: MASKOP_EVEX MXCSR
5326 VCVTPD2QQ VCVTPD2QQ_YMMi64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5327 VCVTPD2QQ VCVTPD2QQ_ZMMi64_MASKmskw_ZMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
5328 VCVTPD2QQ VCVTPD2QQ_ZMMi64_MASKmskw_ZMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
5329 VCVTPD2QQ VCVTPD2QQ_ZMMi64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5654 VCVTUDQ2PS VCVTUDQ2PS_ZMMf32_MASKmskw_ZMMu32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
5655 VCVTUDQ2PS VCVTUDQ2PS_ZMMf32_MASKmskw_ZMMu32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
5656 VCVTUDQ2PS VCVTUDQ2PS_ZMMf32_MASKmskw_MEMu32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5657 VCVTUDQ2PS VCVTUDQ2PS_XMMf32_MASKmskw_XMMu32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
5658 VCVTUDQ2PS VCVTUDQ2PS_XMMf32_MASKmskw_MEMu32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5659 VCVTUDQ2PS VCVTUDQ2PS_YMMf32_MASKmskw_YMMu32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
5660 VCVTUDQ2PS VCVTUDQ2PS_YMMf32_MASKmskw_MEMu32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5686 VCVTTPS2UQQ VCVTTPS2UQQ_XMMu64_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: MASKOP_EVEX MXCSR
5687 VCVTTPS2UQQ VCVTTPS2UQQ_XMMu64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5688 VCVTTPS2UQQ VCVTTPS2UQQ_YMMu64_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: MASKOP_EVEX MXCSR
5689 VCVTTPS2UQQ VCVTTPS2UQQ_YMMu64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5690 VCVTTPS2UQQ VCVTTPS2UQQ_ZMMu64_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
5691 VCVTTPS2UQQ VCVTTPS2UQQ_ZMMu64_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
5692 VCVTTPS2UQQ VCVTTPS2UQQ_ZMMu64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5699 VCVTUDQ2PD VCVTUDQ2PD_ZMMf64_MASKmskw_YMMu32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX
5700 VCVTUDQ2PD VCVTUDQ2PD_ZMMf64_MASKmskw_MEMu32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION
5701 VCVTUDQ2PD VCVTUDQ2PD_XMMf64_MASKmskw_XMMu32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX
5702 VCVTUDQ2PD VCVTUDQ2PD_XMMf64_MASKmskw_MEMu32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION
5703 VCVTUDQ2PD VCVTUDQ2PD_YMMf64_MASKmskw_XMMu32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX
5704 VCVTUDQ2PD VCVTUDQ2PD_YMMf64_MASKmskw_MEMu32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION
5712 VCVTDQ2PS VCVTDQ2PS_ZMMf32_MASKmskw_ZMMi32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
5713 VCVTDQ2PS VCVTDQ2PS_ZMMf32_MASKmskw_ZMMi32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
5714 VCVTDQ2PS VCVTDQ2PS_ZMMf32_MASKmskw_MEMi32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5715 VCVTDQ2PS VCVTDQ2PS_XMMf32_MASKmskw_XMMi32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
5716 VCVTDQ2PS VCVTDQ2PS_XMMf32_MASKmskw_MEMi32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5717 VCVTDQ2PS VCVTDQ2PS_YMMf32_MASKmskw_YMMi32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
5718 VCVTDQ2PS VCVTDQ2PS_YMMf32_MASKmskw_MEMi32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
5759 VCVTDQ2PD VCVTDQ2PD_ZMMf64_MASKmskw_YMMi32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX
5760 VCVTDQ2PD VCVTDQ2PD_ZMMf64_MASKmskw_MEMi32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION
5761 VCVTDQ2PD VCVTDQ2PD_XMMf64_MASKmskw_XMMi32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX
5762 VCVTDQ2PD VCVTDQ2PD_XMMf64_MASKmskw_MEMi32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION
5763 VCVTDQ2PD VCVTDQ2PD_YMMf64_MASKmskw_XMMi32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX
5764 VCVTDQ2PD VCVTDQ2PD_YMMf64_MASKmskw_MEMi32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION
5832 VCVTSS2USI VCVTSS2USI_GPR32u32_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5833 VCVTSS2USI VCVTSS2USI_GPR32u32_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5834 VCVTSS2USI VCVTSS2USI_GPR32u32_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_D MXCSR SIMD_SCALAR
5835 VCVTSS2USI VCVTSS2USI_GPR64u64_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5836 VCVTSS2USI VCVTSS2USI_GPR64u64_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5837 VCVTSS2USI VCVTSS2USI_GPR64u64_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_D MXCSR SIMD_SCALAR
5908 VCVTSI2SS VCVTSI2SS_XMMf32_XMMf32_GPR32i32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5909 VCVTSI2SS VCVTSI2SS_XMMf32_XMMf32_GPR32i32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5910 VCVTSI2SS VCVTSI2SS_XMMf32_XMMf32_MEMi32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_READER MXCSR SIMD_SCALAR
5911 VCVTSI2SS VCVTSI2SS_XMMf32_XMMf32_GPR64i64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5912 VCVTSI2SS VCVTSI2SS_XMMf32_XMMf32_GPR64i64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5913 VCVTSI2SS VCVTSI2SS_XMMf32_XMMf32_MEMi64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_READER MXCSR SIMD_SCALAR
5928 VCVTSD2SS VCVTSD2SS_XMMf32_MASKmskw_XMMf64_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MASKOP_EVEX MXCSR SIMD_SCALAR
5929 VCVTSD2SS VCVTSD2SS_XMMf32_MASKmskw_XMMf64_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MASKOP_EVEX MXCSR SIMD_SCALAR
5930 VCVTSD2SS VCVTSD2SS_XMMf32_MASKmskw_XMMf64_MEMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_SCALAR MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR SIMD_SCALAR
5956 VCVTSI2SD VCVTSI2SD_XMMf64_XMMf64_GPR32i32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: SIMD_SCALAR
5957 VCVTSI2SD VCVTSI2SD_XMMf64_XMMf64_MEMi32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_READER SIMD_SCALAR
5958 VCVTSI2SD VCVTSI2SD_XMMf64_XMMf64_GPR64i64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5959 VCVTSI2SD VCVTSI2SD_XMMf64_XMMf64_GPR64i64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5960 VCVTSI2SD VCVTSI2SD_XMMf64_XMMf64_MEMi64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_READER MXCSR SIMD_SCALAR
5967 VCVTSD2SI VCVTSD2SI_GPR32i32_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5968 VCVTSD2SI VCVTSD2SI_GPR32i32_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5969 VCVTSD2SI VCVTSD2SI_GPR32i32_MEMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_Q MXCSR SIMD_SCALAR
5970 VCVTSD2SI VCVTSD2SI_GPR64i64_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5971 VCVTSD2SI VCVTSD2SI_GPR64i64_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5972 VCVTSD2SI VCVTSD2SI_GPR64i64_MEMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_Q MXCSR SIMD_SCALAR
5984 VCVTTSS2USI VCVTTSS2USI_GPR32u32_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5985 VCVTTSS2USI VCVTTSS2USI_GPR32u32_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5986 VCVTTSS2USI VCVTTSS2USI_GPR32u32_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_D MXCSR SIMD_SCALAR
5987 VCVTTSS2USI VCVTTSS2USI_GPR64u64_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5988 VCVTTSS2USI VCVTTSS2USI_GPR64u64_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
5989 VCVTTSS2USI VCVTTSS2USI_GPR64u64_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_D MXCSR SIMD_SCALAR
6023 VCVTPD2UQQ VCVTPD2UQQ_XMMu64_MASKmskw_XMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: MASKOP_EVEX MXCSR
6024 VCVTPD2UQQ VCVTPD2UQQ_XMMu64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6025 VCVTPD2UQQ VCVTPD2UQQ_YMMu64_MASKmskw_YMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: MASKOP_EVEX MXCSR
6026 VCVTPD2UQQ VCVTPD2UQQ_YMMu64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6027 VCVTPD2UQQ VCVTPD2UQQ_ZMMu64_MASKmskw_ZMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6028 VCVTPD2UQQ VCVTPD2UQQ_ZMMu64_MASKmskw_ZMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6029 VCVTPD2UQQ VCVTPD2UQQ_ZMMu64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6075 VCVTPS2UDQ VCVTPS2UDQ_ZMMu32_MASKmskw_ZMMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6076 VCVTPS2UDQ VCVTPS2UDQ_ZMMu32_MASKmskw_ZMMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6077 VCVTPS2UDQ VCVTPS2UDQ_ZMMu32_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6078 VCVTPS2UDQ VCVTPS2UDQ_XMMu32_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
6079 VCVTPS2UDQ VCVTPS2UDQ_XMMu32_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6080 VCVTPS2UDQ VCVTPS2UDQ_YMMu32_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
6081 VCVTPS2UDQ VCVTPS2UDQ_YMMu32_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6201 VCVTTPD2QQ VCVTTPD2QQ_XMMi64_MASKmskw_XMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: MASKOP_EVEX MXCSR
6202 VCVTTPD2QQ VCVTTPD2QQ_XMMi64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6203 VCVTTPD2QQ VCVTTPD2QQ_YMMi64_MASKmskw_YMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: MASKOP_EVEX MXCSR
6204 VCVTTPD2QQ VCVTTPD2QQ_YMMi64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6205 VCVTTPD2QQ VCVTTPD2QQ_ZMMi64_MASKmskw_ZMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6206 VCVTTPD2QQ VCVTTPD2QQ_ZMMi64_MASKmskw_ZMMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6207 VCVTTPD2QQ VCVTTPD2QQ_ZMMi64_MASKmskw_MEMf64_AVX512 CONVERT AVX512EVEX AVX512DQ_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6208 VCVTTPD2DQ VCVTTPD2DQ_YMMi32_MASKmskw_ZMMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6209 VCVTTPD2DQ VCVTTPD2DQ_YMMi32_MASKmskw_ZMMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6210 VCVTTPD2DQ VCVTTPD2DQ_YMMi32_MASKmskw_MEMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6211 VCVTTPD2DQ VCVTTPD2DQ_XMMi32_MASKmskw_XMMf64_AVX512_VL128 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
6212 VCVTTPD2DQ VCVTTPD2DQ_XMMi32_MASKmskw_MEMf64_AVX512_VL128 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6213 VCVTTPD2DQ VCVTTPD2DQ_XMMi32_MASKmskw_YMMf64_AVX512_VL256 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
6214 VCVTTPD2DQ VCVTTPD2DQ_XMMi32_MASKmskw_MEMf64_AVX512_VL256 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6343 VCVTTSD2SI VCVTTSD2SI_GPR32i32_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
6344 VCVTTSD2SI VCVTTSD2SI_GPR32i32_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
6345 VCVTTSD2SI VCVTTSD2SI_GPR32i32_MEMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_Q MXCSR SIMD_SCALAR
6346 VCVTTSD2SI VCVTTSD2SI_GPR64i64_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
6347 VCVTTSD2SI VCVTTSD2SI_GPR64i64_XMMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: MXCSR SIMD_SCALAR
6348 VCVTTSD2SI VCVTTSD2SI_GPR64i64_MEMf64_AVX512 CONVERT AVX512EVEX AVX512F_SCALAR ATTRIBUTES: DISP8_GPR_WRITER_LDOP_Q MXCSR SIMD_SCALAR
6358 VCVTPD2PS VCVTPD2PS_YMMf32_MASKmskw_ZMMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6359 VCVTPD2PS VCVTPD2PS_YMMf32_MASKmskw_ZMMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6360 VCVTPD2PS VCVTPD2PS_YMMf32_MASKmskw_MEMf64_AVX512_VL512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6361 VCVTPD2PS VCVTPD2PS_XMMf32_MASKmskw_XMMf64_AVX512_VL128 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
6362 VCVTPD2PS VCVTPD2PS_XMMf32_MASKmskw_MEMf64_AVX512_VL128 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6363 VCVTPD2PS VCVTPD2PS_XMMf32_MASKmskw_YMMf64_AVX512_VL256 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
6364 VCVTPD2PS VCVTPD2PS_XMMf32_MASKmskw_MEMf64_AVX512_VL256 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6374 VCVTPS2PH VCVTPS2PH_YMMf16_MASKmskw_ZMMf32_IMM8_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6375 VCVTPS2PH VCVTPS2PH_YMMf16_MASKmskw_ZMMf32_IMM8_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6376 VCVTPS2PH VCVTPS2PH_MEMf16_MASKmskw_ZMMf32_IMM8_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: DISP8_HALFMEM MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6377 VCVTPS2PH VCVTPS2PH_XMMf16_MASKmskw_XMMf32_IMM8_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
6378 VCVTPS2PH VCVTPS2PH_MEMf16_MASKmskw_XMMf32_IMM8_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: DISP8_HALFMEM MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6379 VCVTPS2PH VCVTPS2PH_XMMf16_MASKmskw_YMMf32_IMM8_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
6380 VCVTPS2PH VCVTPS2PH_MEMf16_MASKmskw_YMMf32_IMM8_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: DISP8_HALFMEM MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6396 VCVTPS2PD VCVTPS2PD_ZMMf64_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6397 VCVTPS2PD VCVTPS2PD_ZMMf64_MASKmskw_YMMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: MASKOP_EVEX MXCSR
6398 VCVTPS2PD VCVTPS2PD_ZMMf64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_512 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6399 VCVTPS2PD VCVTPS2PD_XMMf64_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: MASKOP_EVEX MXCSR
6400 VCVTPS2PD VCVTPS2PD_XMMf64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_128 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
6401 VCVTPS2PD VCVTPS2PD_YMMf64_MASKmskw_XMMf32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: MASKOP_EVEX MXCSR
6402 VCVTPS2PD VCVTPS2PD_YMMf64_MASKmskw_MEMf32_AVX512 CONVERT AVX512EVEX AVX512F_256 ATTRIBUTES: BROADCAST_ENABLED DISP8_HALF MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR
*/
#endif // REMILL_ARCH_X86_SEMANTICS_CONVERT_H_
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