mirror of
https://github.com/naksyn/PythonMemoryModule
synced 2026-06-06 16:24:25 +00:00
db1893910c
This update include support to passing command line parameters to unmanaged exe via PEB stomping. This technique is not working with every executable since it depends on which functions are used to pass arguments. Generally, to get a universally working technique would be required to hook GetCommandlineA GetCommandlineW __getmainargs and __wgetmainargs since PEB stomping won't cover all cases, more details here: https://blog-30cm-tw.translate.goog/2020/08/windows-c-mainargc-argv.html?_x_tr_sl=auto&_x_tr_tl=en&_x_tr_hl=it&_x_tr_pto=wapp However, during my testing I found that mimikatz and several go binaries are working just by doing PEB stomping. On the other hand, cmdline passing via PEB stomping alone to mingw and VS compiled binaries won't likely work.
1187 lines
38 KiB
Python
1187 lines
38 KiB
Python
import sys
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import collections
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import struct
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import binascii
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# py3
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is_py3 = (sys.version_info.major >= 3)
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if is_py3:
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basestring = str
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int_types = int
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else:
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int_types = (int, long)
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class BitArray(object):
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def __init__(self, size, bits):
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self.size = size
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if len(bits) > size:
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raise ValueError("size > len(bits)")
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bits_list = []
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for bit in bits:
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x = int(bit)
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if x not in [0, 1]:
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raise ValueError("Not expected bits value {0}".format(x))
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bits_list.append(x)
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self.array = bits_list
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if size > len(self.array):
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self.array = ([0] * (size - len(self.array))) + self.array
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def copy(self):
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new = type(self)(0, "")
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new.size = self.size
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new.array = list(self.array)
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return new
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def dump(self):
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res = []
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for i in range(self.size // 8):
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c = 0
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for x in (self.array[i * 8: (i + 1) * 8]):
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c = (c << 1) + x
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res.append(c)
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return bytearray((res))
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def __getitem__(self, slice):
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return self.array[slice]
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def __setitem__(self, slice, value):
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self.array[slice] = value
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return True
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def __repr__(self):
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return repr(self.array)
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def __add__(self, other):
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if not isinstance(other, BitArray):
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return NotImplemented
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return BitArray(self.size + other.size, self.array + other.array)
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def to_int(self):
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return int("".join([str(i) for i in self.array]), 2)
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@classmethod
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def from_string(cls, str_base):
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l = []
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for c in bytearray(reversed(str_base)):
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for i in range(8):
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l.append(c & 1)
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c = c >> 1
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return cls(len(str_base) * 8, list(reversed(l)))
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@classmethod
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def from_int(cls, size, x):
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if x < 0:
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x = x & ((2 ** size) - 1)
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return cls(size, bin(x)[2:])
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# Prefix
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class Prefix(object):
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PREFIX_VALUE = None
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def __init__(self, next=None):
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self.next = next
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def __add__(self, other):
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return type(self)(other)
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def get_code_py3(self):
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return bytes([self.PREFIX_VALUE]) + self.next.get_code()
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def get_code(self):
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return chr(self.PREFIX_VALUE) + self.next.get_code()
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if is_py3:
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get_code = get_code_py3
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def create_prefix(name, value):
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prefix_type = type(name + "Type", (Prefix,), {'PREFIX_VALUE': value})
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return prefix_type()
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LockPrefix = create_prefix('LockPrefix', 0xf0)
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Repne = create_prefix('Repne', 0xf2)
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Rep = create_prefix('Rep', 0xf3)
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SSPrefix = create_prefix('SSPrefix', 0x36)
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CSPrefix = create_prefix('CSPrefix', 0x2e)
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DSPrefix = create_prefix('DSPrefix', 0x3e)
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ESPrefix = create_prefix('ESPrefix', 0x26)
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FSPrefix = create_prefix('FSPrefix', 0x64)
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GSPrefix = create_prefix('GSPrefix', 0x65)
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OperandSizeOverride = create_prefix('OperandSizeOverride', 0x66)
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AddressSizeOverride = create_prefix('AddressSizeOverride', 0x67)
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# Main informations about X86
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mem_access = collections.namedtuple('mem_access', ['base', 'index', 'scale', 'disp', 'prefix'])
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x86_regs = ['EAX', 'ECX', 'EDX', 'EBX', 'ESP', 'EBP', 'ESI', 'EDI']
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x86_16bits_regs = ['AX', 'CX', 'DX', 'BX', 'SP', 'BP', 'SI', 'DI']
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x86_segment_selectors = {'CS': CSPrefix, 'DS': DSPrefix, 'ES': ESPrefix, 'SS': SSPrefix,
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'FS': FSPrefix, 'GS': GSPrefix}
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# Man intel -> Sreg (Vol 2.a 3-6)
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x86_segment_selectors_number = {
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"ES": "000",
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"CS": "001",
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"SS": "010",
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"DS": "011",
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"FS": "100",
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"GS": "101",
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}
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class X86(object):
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@staticmethod
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def is_reg(name):
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try:
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return name.upper() in x86_regs + x86_16bits_regs
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except AttributeError: # Not a string
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return False
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@staticmethod
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def is_seg_reg(name):
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try:
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return name.upper() in x86_segment_selectors_number
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except AttributeError:
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return False
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@staticmethod
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def reg_size(name):
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if name.upper() in x86_regs:
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return 32
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elif name.upper() in x86_16bits_regs:
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return 16
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else:
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raise ValueError("Unknow register <{0}>".format(name))
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@staticmethod
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def is_mem_acces(data):
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return isinstance(data, mem_access)
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@staticmethod
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def mem_access_has_only(mem_access, names):
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if not X86.is_mem_acces(mem_access):
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raise ValueError("mem_access_has_only")
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for f in mem_access._fields:
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v = getattr(mem_access, f)
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if v and f != 'prefix' and f not in names:
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return False
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if v is None and f in names:
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return False
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return True
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def create_displacement(base=None, index=None, scale=None, disp=0, prefix=None):
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"""Creates a X86 memory access description"""
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if index is not None and scale is None:
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scale = 1
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if scale and index is None:
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raise ValueError("Cannot create displacement with scale and no index")
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if scale and index.upper() == "ESP":
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raise ValueError("Cannot create displacement with index == ESP")
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return mem_access(base, index, scale, disp, prefix)
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def deref(disp):
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"""Create a memory access for an immediate value ``Ex: [0x42424242]``"""
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return create_displacement(disp=disp)
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def mem(data):
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"""Parse a memory access string of format ``[EXPR]`` or ``seg:[EXPR]``
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``EXPR`` may describe: ``BASE | INDEX * SCALE | DISPLACEMENT`` or any combinaison (in this order)
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"""
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if not isinstance(data, str):
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raise TypeError("mem need a string to parse")
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data = data.strip()
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prefix = None
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if not (data.startswith("[") and data.endswith("]")):
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if data[2] != ":":
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raise ValueError("mem acces expect <[EXPR]> or <seg:[EXPR]")
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prefix_name = data[:2].upper()
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if prefix_name not in x86_segment_selectors:
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raise ValueError("Unknow segment selector {0}".format(prefix_name))
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prefix = prefix_name
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data = data[3:]
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if not (data.startswith("[") and data.endswith("]")):
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raise ValueError("mem acces expect <[EXPR]> or <seg:[EXPR]")
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# A l'arrache.. j'aime pas le parsing de trucs
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data = data[1:-1]
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items = data.split("+")
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parsed_items = {'prefix': prefix}
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for item in items:
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item = item.strip()
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# Index * scale
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if "*" in item:
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if 'index' in parsed_items:
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raise ValueError("Multiple index / index*scale in mem expression <{0}>".format(data))
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sub_items = item.split("*")
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if len(sub_items) != 2:
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raise ValueError("Invalid item <{0}> in mem access".format(item))
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index, scale = sub_items
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index, scale = index.strip(), scale.strip()
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if not X86.is_reg(index):
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raise ValueError("Invalid index <{0}> in mem access".format(index))
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if X86.reg_size(index) == 16:
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raise NotImplementedError("16bits modrm")
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try:
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scale = int(scale, 0)
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except ValueError:
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raise ValueError("Invalid scale <{0}> in mem access".format(scale))
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parsed_items['scale'] = scale
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parsed_items['index'] = index
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else:
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# displacement / base / index alone
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if X86.is_reg(item):
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if X86.reg_size(item) == 16:
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raise NotImplementedError("16bits modrm")
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if 'base' not in parsed_items:
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parsed_items['base'] = item
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continue
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# Already have base + index -> cannot avec another register in expression
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if 'index' in parsed_items:
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raise ValueError("Multiple index / index*scale in mem expression <{0}>".format(data))
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parsed_items['index'] = item
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continue
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try:
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disp = int(item, 0)
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except ValueError:
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raise ValueError("Invalid base/index or displacement <{0}> in mem access".format(item))
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if 'disp' in parsed_items:
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raise ValueError("Multiple displacement in mem expression <{0}>".format(data))
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parsed_items['disp'] = disp
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return create_displacement(**parsed_items)
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# Helper to get the BitArray associated to a register
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class X86RegisterSelector(object):
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size = 3 # bits
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reg_opcode = {v: BitArray.from_int(size=3, x=i) for i, v in enumerate(x86_regs)}
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reg_opcode.update({v: BitArray.from_int(size=3, x=i) for i, v in enumerate(x86_16bits_regs)})
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def accept_arg(self, args, instr_state):
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x = args[0]
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try:
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return (1, self.reg_opcode[x.upper()])
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except (KeyError, AttributeError):
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return (None, None)
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@classmethod
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def get_reg_bits(cls, name):
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return cls.reg_opcode[name.upper()]
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# Instruction Parameters
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class FixedRegister(object):
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def __init__(self, register):
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self.reg = register.upper()
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def accept_arg(self, args, instr_state):
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x = args[0]
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if isinstance(x, str) and x.upper() == self.reg:
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return (1, BitArray(0, []))
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return None, None
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RegisterEax = lambda: FixedRegister('EAX')
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class RawBits(BitArray):
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def accept_arg(self, args, instr_state):
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return (0, self.copy())
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# Immediat value logic
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# All 8/16 bits stuff are sign extended
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class ImmediatOverflow(ValueError):
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pass
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def accept_as_8immediat(x):
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try:
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return struct.pack("<b", x)
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except struct.error:
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raise ImmediatOverflow("8bits signed Immediat overflow")
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def accept_as_unsigned_8immediat(x):
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try:
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return struct.pack("<B", x)
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except struct.error:
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raise ImmediatOverflow("8bits signed Immediat overflow")
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def accept_as_16immediat(x):
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try:
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return struct.pack("<h", x)
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except struct.error:
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raise ImmediatOverflow("16bits signed Immediat overflow")
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def accept_as_unsigned_16immediat(x):
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try:
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return struct.pack("<H", x)
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except struct.error:
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raise ImmediatOverflow("16bits unsigned Immediat overflow")
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def accept_as_32immediat(x):
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try:
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return struct.pack("<i", x)
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except struct.error:
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pass
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try:
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return struct.pack("<I", x)
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except struct.error:
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raise ImmediatOverflow("32bits signed Immediat overflow")
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class Imm8(object):
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def accept_arg(self, args, instr_state):
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try:
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x = int(args[0])
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except (ValueError, TypeError):
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return (None, None)
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try:
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imm8 = accept_as_8immediat(x)
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except ImmediatOverflow:
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return None, None
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return (1, BitArray.from_string(imm8))
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class UImm8(object):
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def accept_arg(self, args, instr_state):
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try:
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x = int(args[0])
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except (ValueError, TypeError):
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return (None, None)
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try:
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imm8 = accept_as_unsigned_8immediat(x)
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except ImmediatOverflow:
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return None, None
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return (1, BitArray.from_string(imm8))
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class Imm16(object):
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def accept_arg(self, args, instr_state):
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try:
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x = int(args[0])
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except (ValueError, TypeError):
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return (None, None)
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try:
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imm16 = accept_as_16immediat(x)
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except ImmediatOverflow:
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return None, None
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return (1, BitArray.from_string(imm16))
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class UImm16(object):
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def accept_arg(self, args, instr_state):
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try:
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x = int(args[0])
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except (ValueError, TypeError):
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return (None, None)
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try:
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imm16 = accept_as_unsigned_16immediat(x)
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except ImmediatOverflow:
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return None, None
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return (1, BitArray.from_string(imm16))
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class Imm32(object):
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def accept_arg(self, args, instr_state):
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try:
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x = int(args[0])
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except (ValueError, TypeError):
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return (None, None)
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try:
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imm32 = accept_as_32immediat(x)
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except ImmediatOverflow:
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return None, None
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return (1, BitArray.from_string(imm32))
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class SegmentSelectorAbsoluteAddr(object):
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def accept_arg(self, args, instr_state):
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sizess, datass = UImm16().accept_arg(args, instr_state)
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if sizess is None:
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return None, None
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sizeabs, dataabs = Imm32().accept_arg(args[1:], instr_state)
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if sizeabs is None:
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return None, None
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return (sizess + sizeabs, dataabs + datass)
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class ModRM(object):
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def __init__(self, sub_modrm, accept_reverse=True, has_direction_bit=True):
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self.accept_reverse = accept_reverse
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self.has_direction_bit = has_direction_bit
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self.sub = sub_modrm
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def accept_arg(self, args, instr_state):
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if len(args) < 2:
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raise ValueError("Missing arg for modrm")
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arg1 = args[0]
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arg2 = args[1]
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for sub in self.sub:
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# Problem in reverse sens -> need to fix it
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if sub.match(arg1, arg2):
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d = sub(arg1, arg2, 0, instr_state)
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if self.has_direction_bit:
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instr_state.previous[0][-2] = d.direction
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return (2, d.mod + d.reg + d.rm + d.after)
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elif self.accept_reverse and sub.match(arg2, arg1):
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d = sub(arg2, arg1, 1, instr_state)
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if self.has_direction_bit:
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instr_state.previous[0][-2] = d.direction
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return (2, d.mod + d.reg + d.rm + d.after)
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return (None, None)
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|
|
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class ModRM_REG__REG(object):
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@classmethod
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def match(cls, arg1, arg2):
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return X86.is_reg(arg1) and X86.is_reg(arg2)
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def __init__(self, arg1, arg2, reversed, instr_state):
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self.mod = BitArray(2, "11")
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if X86.reg_size(arg1) != X86.reg_size(arg2):
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raise ValueError("Register size mitmatch between {0} and {1}".format(arg1, arg2))
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if X86.reg_size(arg1) == 16:
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instr_state.prefixes.append(OperandSizeOverride)
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self.reg = X86RegisterSelector.get_reg_bits(arg2)
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self.rm = X86RegisterSelector.get_reg_bits(arg1)
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self.after = BitArray(0, "")
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self.direction = 0
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class ModRM_REG__SEGREG(object):
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@classmethod
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def match(cls, arg1, arg2):
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return X86.is_reg(arg1) and X86.is_seg_reg(arg2)
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def __init__(self, arg1, arg2, reversed, instr_state):
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self.mod = BitArray(2, "11")
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self.rm = X86RegisterSelector.get_reg_bits(arg1)
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self.reg = BitArray(3, x86_segment_selectors_number[arg2.upper()])
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self.after = BitArray(0, "")
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self.direction = reversed
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|
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class ModRM_REG__MEM(object):
|
|
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@classmethod
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def match(cls, arg1, arg2):
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return X86.is_reg(arg1) and X86.is_mem_acces(arg2)
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|
|
|
def setup_reg_as_register(self, regname, instr_state):
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self.reg = X86RegisterSelector.get_reg_bits(regname)
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if X86.reg_size(regname) == 16:
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instr_state.prefixes.append(OperandSizeOverride)
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|
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def __init__(self, arg1, arg2, reversed, instr_state):
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# ARG1 : REG
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# ARG2 : prefix:[MEM]
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# Handle prefix:
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if arg2.prefix is not None:
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instr_state.prefixes.append(x86_segment_selectors[arg2.prefix])
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if X86.mem_access_has_only(arg2, ["disp"]):
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self.mod = BitArray(2, "00")
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self.setup_reg_as_register(arg1, instr_state)
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self.rm = BitArray(3, "101")
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try:
|
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self.after = BitArray.from_string(accept_as_32immediat(arg2.disp))
|
|
except ImmediatOverflow:
|
|
raise ImmediatOverflow("Interger32 overflow for displacement {0}".format(hex(arg2.disp)))
|
|
self.direction = not reversed
|
|
return
|
|
# Those registers cannot be addressed without SIB
|
|
# No index -> no scale -> no SIB
|
|
FIRE_UP_SIB = (arg2.base and arg2.base.upper() in ["ESP", "EBP"]) or arg2.index
|
|
if not FIRE_UP_SIB:
|
|
self.setup_reg_as_register(arg1, instr_state)
|
|
self.rm = X86RegisterSelector.get_reg_bits(arg2.base)
|
|
self.compute_displacement(arg2.disp)
|
|
self.direction = not reversed
|
|
return
|
|
# FIRE UP THE SIB
|
|
# Handle no base and base == EBP special case
|
|
if not arg2.base:
|
|
force_displacement = 4
|
|
elif arg2.base.upper() == "EBP":
|
|
force_displacement = 1
|
|
else:
|
|
force_displacement = 0
|
|
|
|
self.setup_reg_as_register(arg1, instr_state)
|
|
self.rm = BitArray(3, "100")
|
|
self.compute_displacement(arg2.disp, force_displacement)
|
|
self.after = self.compute_sib(arg2) + self.after
|
|
if not arg2.base:
|
|
self.mod = BitArray(2, "00")
|
|
self.direction = not reversed
|
|
|
|
def compute_displacement(self, displacement, force_displacement=0):
|
|
if not displacement and not force_displacement:
|
|
self.mod = BitArray(2, "00")
|
|
self.after = BitArray(0, "")
|
|
return
|
|
# Pack in a byte
|
|
try:
|
|
v = accept_as_8immediat(displacement)
|
|
except ImmediatOverflow:
|
|
v = None
|
|
if v is not None and force_displacement <= 1:
|
|
self.mod = BitArray(2, "01")
|
|
self.after = BitArray.from_string(v)
|
|
return
|
|
# Pack in a dword
|
|
try:
|
|
v = accept_as_32immediat(displacement)
|
|
except ImmediatOverflow:
|
|
v = None
|
|
if v is not None and force_displacement <= 4:
|
|
self.mod = BitArray(2, "10")
|
|
self.after = BitArray.from_string(v)
|
|
return
|
|
raise ValueError("Displacement {0} is too big".format(hex(displacement)))
|
|
|
|
def compute_sib(self, mem_access):
|
|
scale = {1: 0, 2: 1, 4: 2, 8: 3}
|
|
if mem_access.index is None:
|
|
return BitArray(2, "00") + BitArray(3, "100") + X86RegisterSelector.get_reg_bits(mem_access.base)
|
|
if mem_access.scale not in scale:
|
|
raise ValueError("Invalid scale for mem access <{0}>".format(mem_access.scale))
|
|
if mem_access.base is None:
|
|
return BitArray.from_int(2, scale[mem_access.scale]) + X86RegisterSelector.get_reg_bits(mem_access.index) + BitArray(3, "101")
|
|
return BitArray.from_int(2, scale[mem_access.scale]) + X86RegisterSelector.get_reg_bits(mem_access.index) + X86RegisterSelector.get_reg_bits(mem_access.base)
|
|
|
|
|
|
class Slash(object):
|
|
"No idea for the name: represent the modRM for single args + encoding in reg (/7 in cmp in man intel)"
|
|
|
|
def __init__(self, reg_num):
|
|
"reg = 7 for /7"
|
|
self.reg = x86_regs[reg_num]
|
|
|
|
def accept_arg(self, args, instr_state):
|
|
if len(args) < 1:
|
|
raise ValueError("Missing arg for Slash")
|
|
# Reuse all the MODRm logique with the reg as our self.reg
|
|
# The sens of param is strange I need to fix the `reversed` logique
|
|
arg_consum, value = ModRM([ModRM_REG__REG, ModRM_REG__MEM], has_direction_bit=False).accept_arg(args[:1] + [self.reg] + args[1:], instr_state)
|
|
if value is None:
|
|
return arg_consum, value
|
|
return arg_consum - 1, value
|
|
|
|
class ControlRegisterModRM(object):
|
|
def __init__(self, writecr = False):
|
|
self.writecr = writecr
|
|
|
|
def accept_arg(self, args, instr_state):
|
|
writecr = self.writecr
|
|
if len(args) < 2:
|
|
return None, None
|
|
reg = args[writecr]
|
|
cr = args[not writecr]
|
|
if not isinstance(cr, str):
|
|
return None, None
|
|
if not cr.lower().startswith("cr"):
|
|
return None, None
|
|
try:
|
|
cr_number = int(cr[2:], 10)
|
|
except ValueError as e:
|
|
raise ValueError("Invalid ControlRegister {0}".format(cr))
|
|
if cr_number > 7:
|
|
raise ValueError("Invalid ControlRegister {0}".format(cr))
|
|
|
|
modrm_params = [reg, x86_regs[cr_number]] + args[2:]
|
|
return ModRM([ModRM_REG__REG], has_direction_bit=False).accept_arg(modrm_params, instr_state)
|
|
|
|
|
|
instr_state = collections.namedtuple('instr_state', ['previous', 'prefixes'])
|
|
|
|
class Instruction(object):
|
|
"""Base class of instructions, use `encoding` to find a valid way to assemble the instruction"""
|
|
encoding = []
|
|
|
|
def __init__(self, *initial_args):
|
|
# print(self, initial_args)
|
|
for type_encoding in self.encoding:
|
|
args = list(initial_args)
|
|
prefix = []
|
|
res = []
|
|
for element in type_encoding:
|
|
arg_consum, value = element.accept_arg(args, instr_state(res, prefix))
|
|
if arg_consum is None:
|
|
break
|
|
res.append(value)
|
|
del args[:arg_consum]
|
|
else: # if no break
|
|
if args: # if still args: fail
|
|
continue
|
|
self.value = sum(res, BitArray(0, ""))
|
|
self.prefix = prefix
|
|
return
|
|
raise ValueError("Cannot encode <{0} {1}>:(".format(type(self).__name__, initial_args))
|
|
|
|
def get_code(self):
|
|
# print(self.value)
|
|
prefix_opcode = b"".join(chr(p.PREFIX_VALUE) for p in self.prefix)
|
|
return prefix_opcode + bytes(self.value.dump())
|
|
|
|
def get_code_py3(self):
|
|
prefix_opcode = b"".join(bytes([p.PREFIX_VALUE]) for p in self.prefix)
|
|
return prefix_opcode + bytes(self.value.dump())
|
|
|
|
if is_py3:
|
|
get_code = get_code_py3
|
|
|
|
#def __add__(self, other):
|
|
# res = MultipleInstr()
|
|
# res += self
|
|
# res += other
|
|
# return res
|
|
|
|
def __mul__(self, value):
|
|
if not isinstance(value, int_types):
|
|
return NotImplemented
|
|
res = MultipleInstr()
|
|
for i in range(value):
|
|
res += self
|
|
return res
|
|
|
|
|
|
# Jump helpers
|
|
class DelayedJump(object):
|
|
"""A jump to a label :NAME"""
|
|
|
|
def __init__(self, type, label):
|
|
self.type = type
|
|
self.label = label
|
|
|
|
|
|
class JmpType(Instruction):
|
|
"""Dispatcher between a real jump or DelayedJump if parameters is a label"""
|
|
|
|
def __new__(cls, *initial_args):
|
|
if len(initial_args) == 1:
|
|
arg = initial_args[0]
|
|
if isinstance(arg, str) and arg[0] == ":":
|
|
return DelayedJump(cls, arg)
|
|
return super(JmpType, cls).__new__(cls)
|
|
|
|
|
|
class JmpImm(object):
|
|
"""Immediat parameters for Jump instruction
|
|
Sub a specified size from the size to jump to `emulate` a jump from the begin address of the instruction"""
|
|
accept_as_Ximmediat = None
|
|
|
|
def __init__(self, sub):
|
|
self.sub = sub
|
|
|
|
def accept_arg(self, args, instr_state):
|
|
try:
|
|
jump_size = int(args[0])
|
|
except (ValueError, TypeError):
|
|
return (None, None)
|
|
jump_size -= self.sub
|
|
try:
|
|
jmp_imm = self.accept_as_Ximmediat(jump_size)
|
|
except ImmediatOverflow:
|
|
return (None, None)
|
|
return (1, BitArray.from_string(jmp_imm))
|
|
|
|
|
|
class JmpImm8(JmpImm):
|
|
accept_as_Ximmediat = staticmethod(accept_as_8immediat)
|
|
|
|
|
|
class JmpImm32(JmpImm):
|
|
accept_as_Ximmediat = staticmethod(accept_as_32immediat)
|
|
|
|
|
|
# Instructions
|
|
|
|
class Call(JmpType):
|
|
encoding = [(RawBits.from_int(8, 0xe8), JmpImm32(5)),
|
|
(RawBits.from_int(8, 0xff), Slash(2)),
|
|
(RawBits.from_int(8, 0x9a), SegmentSelectorAbsoluteAddr())]
|
|
|
|
class Jmp(JmpType):
|
|
encoding = [(RawBits.from_int(8, 0xeb), JmpImm8(2)),
|
|
(RawBits.from_int(8, 0xe9), JmpImm32(5)),
|
|
(RawBits.from_int(8, 0xea), SegmentSelectorAbsoluteAddr())]
|
|
|
|
|
|
class Jz(JmpType):
|
|
encoding = [(RawBits.from_int(8, 0x74), JmpImm8(2)),
|
|
(RawBits.from_int(16, 0x0f84), JmpImm32(6))]
|
|
|
|
|
|
Je = Jz
|
|
|
|
|
|
class Jnz(JmpType):
|
|
encoding = [(RawBits.from_int(8, 0x75), JmpImm8(2)),
|
|
(RawBits.from_int(16, 0x0f85), JmpImm32(6))]
|
|
|
|
|
|
class Jbe(JmpType):
|
|
encoding = [(RawBits.from_int(8, 0x76), JmpImm8(2)),
|
|
(RawBits.from_int(16, 0x0f86), JmpImm32(6))]
|
|
|
|
|
|
class Jnb(JmpType):
|
|
encoding = [(RawBits.from_int(8, 0x73), JmpImm8(2)),
|
|
(RawBits.from_int(16, 0x0f83), JmpImm32(6))]
|
|
|
|
|
|
class Push(Instruction):
|
|
encoding = [(RawBits.from_int(5, 0x50 >> 3), X86RegisterSelector()),
|
|
(RawBits.from_int(8, 0x68), Imm32()),
|
|
(RawBits.from_int(8, 0xff), Slash(6))]
|
|
|
|
|
|
class Pop(Instruction):
|
|
encoding = [(RawBits.from_int(5, 0x58 >> 3), X86RegisterSelector())]
|
|
|
|
|
|
class Dec(Instruction):
|
|
encoding = [(RawBits.from_int(5, 0x48 >> 3), X86RegisterSelector())]
|
|
|
|
|
|
class Inc(Instruction):
|
|
encoding = [(RawBits.from_int(5, 0x40 >> 3), X86RegisterSelector()),
|
|
(RawBits.from_int(8, 0xff), Slash(0))]
|
|
|
|
|
|
class Add(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0x05), RegisterEax(), Imm32()),
|
|
(RawBits.from_int(8, 0x81), Slash(0), Imm32()),
|
|
(RawBits.from_int(8, 0x01), ModRM([ModRM_REG__REG, ModRM_REG__MEM]))]
|
|
|
|
class And(Instruction):
|
|
default_32_bits = True
|
|
encoding = [(RawBits.from_int(8, 0x25), RegisterEax(), Imm32()),
|
|
(RawBits.from_int(8, 0x81), Slash(4), Imm32()),
|
|
(RawBits.from_int(8, 0x21), ModRM([ModRM_REG__REG, ModRM_REG__MEM]))]
|
|
|
|
|
|
class Or(Instruction):
|
|
default_32_bits = True
|
|
encoding = [(RawBits.from_int(8, 0x0d), RegisterEax(), Imm32()),
|
|
(RawBits.from_int(8, 0x81), Slash(1), Imm32()),
|
|
(RawBits.from_int(8, 0x09), ModRM([ModRM_REG__REG, ModRM_REG__MEM]))]
|
|
|
|
|
|
class Sub(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0x2D), RegisterEax(), Imm32()),
|
|
(RawBits.from_int(8, 0x81), Slash(5), Imm32()),
|
|
(RawBits.from_int(8, 0x29), ModRM([ModRM_REG__REG, ModRM_REG__MEM]))]
|
|
|
|
|
|
class Mov(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0x89), ModRM([ModRM_REG__REG, ModRM_REG__MEM])),
|
|
(RawBits.from_int(8, 0xc7), Slash(0), Imm32()),
|
|
(RawBits.from_int(5, 0xB8 >> 3), X86RegisterSelector(), Imm32()),
|
|
(RawBits.from_int(8, 0x8C), ModRM([ModRM_REG__SEGREG])),
|
|
(RawBits.from_int(16, 0x0f20), ControlRegisterModRM(writecr=False)),
|
|
(RawBits.from_int(16, 0x0f22), ControlRegisterModRM(writecr=True))]
|
|
|
|
|
|
class Movsb(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xa4),)]
|
|
|
|
|
|
class Movsd(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xa5),)]
|
|
|
|
|
|
class Pushfd(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0x9c),)]
|
|
|
|
|
|
class Pushad(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0x60),)]
|
|
|
|
|
|
class Popfd(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0x9d),)]
|
|
|
|
|
|
class Popad(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0x61),)]
|
|
|
|
|
|
class Lea(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0x8d), ModRM([ModRM_REG__MEM], accept_reverse=False, has_direction_bit=False))]
|
|
|
|
|
|
class Cmp(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0x3d), RegisterEax(), Imm32()),
|
|
(RawBits.from_int(8, 0x81), Slash(7), Imm32()),
|
|
(RawBits.from_int(8, 0x3b), ModRM([ModRM_REG__REG, ModRM_REG__MEM]))]
|
|
|
|
|
|
class Test(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xf7), Slash(0), Imm32()),
|
|
(RawBits.from_int(8, 0x85), ModRM([ModRM_REG__REG, ModRM_REG__MEM], has_direction_bit=False))]
|
|
|
|
|
|
class Out(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xee), FixedRegister('DX'), FixedRegister('AL')),
|
|
(RawBits.from_int(16, 0x66ef), FixedRegister('DX'), FixedRegister('AX')), # Fuck-it hardcoded prefix for now
|
|
(RawBits.from_int(8, 0xef), FixedRegister('DX'), FixedRegister('EAX'))]
|
|
|
|
|
|
class In(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xec), FixedRegister('AL'), FixedRegister('DX')),
|
|
(RawBits.from_int(16, 0x66ed), FixedRegister('AX'), FixedRegister('DX')), # Fuck-it hardcoded prefix for now
|
|
(RawBits.from_int(8, 0xed), FixedRegister('EAX'), FixedRegister('DX'))]
|
|
|
|
|
|
class Xor(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0x31), ModRM([ModRM_REG__REG]))]
|
|
|
|
|
|
class Xchg(Instruction):
|
|
encoding = [(RawBits.from_int(5, 0x90 >> 3), RegisterEax(), X86RegisterSelector()), (RawBits.from_int(5, 0x90 >> 3), X86RegisterSelector(), RegisterEax())]
|
|
|
|
|
|
class Rol(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xC1), Slash(0), Imm8())]
|
|
|
|
class Ror(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xC1), Slash(1), Imm8())]
|
|
|
|
class Shr(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xC1), Slash(5), Imm8())]
|
|
|
|
class Shl(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xC1), Slash(4), Imm8())]
|
|
|
|
class Cpuid(Instruction):
|
|
encoding = [(RawBits.from_int(16, 0x0fa2),)]
|
|
|
|
|
|
class Ret(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xc3),),
|
|
(RawBits.from_int(8, 0xc2), UImm16())]
|
|
|
|
|
|
class ScasB(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xAE),)]
|
|
|
|
class ScasW(Instruction):
|
|
encoding = [(RawBits.from_int(16, 0x66AF),)]
|
|
|
|
class ScasD(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xAF),)]
|
|
|
|
|
|
class StosB(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xAA),)]
|
|
|
|
class StosW(Instruction):
|
|
encoding = [(RawBits.from_int(16, 0x66AB),)]
|
|
|
|
class StosD(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xAB),)]
|
|
|
|
|
|
class CmpsB(Instruction):
|
|
default_32_bits = True
|
|
encoding = [(RawBits.from_int(8, 0xa6),)]
|
|
|
|
|
|
class CmpsW(Instruction):
|
|
default_32_bits = True
|
|
encoding = [(RawBits.from_int(16, 0x66A7),)]
|
|
|
|
|
|
class CmpsD(Instruction):
|
|
default_32_bits = True
|
|
encoding = [(RawBits.from_int(8, 0xa7),)]
|
|
|
|
|
|
class Nop(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0x90),)]
|
|
|
|
class Not(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xF7), Slash(2))]
|
|
|
|
class Retf(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xcb),)]
|
|
|
|
class Int(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xcd), UImm8())]
|
|
|
|
class Int3(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xcc),)]
|
|
|
|
class Iret(Instruction):
|
|
encoding = [(RawBits.from_int(8, 0xcf),)]
|
|
|
|
|
|
class _NopArtifact(Nop):
|
|
"""Special NOP used in shellcode reduction"""
|
|
pass
|
|
|
|
|
|
class Byte(Instruction):
|
|
"""Output a raw byte"""
|
|
encoding = [(UImm8(),)]
|
|
|
|
|
|
class Raw(Instruction):
|
|
"""Output raw data"""
|
|
def __init__(self, *initial_args):
|
|
if len(initial_args) != 1:
|
|
raise ValueError("raw 'opcode' only accept one argument")
|
|
# Accept space
|
|
self.data = binascii.unhexlify(initial_args[0].replace(" ", ""))
|
|
|
|
def get_code(self):
|
|
return self.data
|
|
|
|
|
|
|
|
|
|
class Label(object):
|
|
def __init__(self, name):
|
|
self.name = name
|
|
|
|
|
|
def JmpAt(addr):
|
|
code = MultipleInstr()
|
|
code += Push(addr)
|
|
code += Ret()
|
|
return code
|
|
|
|
|
|
class MultipleInstr(object):
|
|
JUMP_SIZE = 6
|
|
|
|
def __init__(self, init_instrs=()):
|
|
self.instrs = {}
|
|
self.labels = {}
|
|
self.expected_labels = {}
|
|
# List of all labeled jump already resolved
|
|
# Will be used for 'relocation'
|
|
self.computed_jump = []
|
|
self.size = 0
|
|
for i in init_instrs:
|
|
self += i
|
|
|
|
def get_code(self):
|
|
if self.expected_labels:
|
|
raise ValueError("Unresolved labels: {0}".format(self.expected_labels.keys()))
|
|
return b"".join([x[1].get_code() for x in sorted(self.instrs.items())])
|
|
|
|
def add_instruction(self, instruction):
|
|
if isinstance(instruction, Label):
|
|
return self.add_label(instruction)
|
|
# Change DelayedJump to LabeledJump ?
|
|
if isinstance(instruction, DelayedJump):
|
|
return self.add_delayed_jump(instruction)
|
|
if isinstance(instruction, (Instruction, Prefix)):
|
|
self.instrs[self.size] = instruction
|
|
self.size += len(instruction.get_code())
|
|
return
|
|
raise ValueError("Don't know what to do with {0} of type {1}".format(instruction, type(instruction)))
|
|
|
|
def add_label(self, label):
|
|
if label.name not in self.expected_labels:
|
|
# Label that have no jump before definition
|
|
# Just registed the address of the label
|
|
self.labels[label.name] = self.size
|
|
return
|
|
# Label with jmp before definition
|
|
# Lot of stuff todo:
|
|
# Find all delayed jump that refer to this jump
|
|
# Replace them with real jump
|
|
# If size of jump < JUMP_SIZE: relocate everything we can
|
|
# Update expected_labels
|
|
for jump_to_label in self.expected_labels[label.name]:
|
|
if jump_to_label.offset in self.instrs:
|
|
raise ValueError("WTF REPLACE EXISTING INSTR...")
|
|
distance = self.size - jump_to_label.offset
|
|
real_jump = jump_to_label.type(distance)
|
|
self.instrs[jump_to_label.offset] = real_jump
|
|
self.computed_jump.append((jump_to_label.offset, self.size))
|
|
for i in range(self.JUMP_SIZE - len(real_jump.get_code())):
|
|
self.instrs[jump_to_label.offset + len(real_jump.get_code()) + i] = _NopArtifact()
|
|
del self.expected_labels[label.name]
|
|
self.labels[label.name] = self.size
|
|
if not self.expected_labels:
|
|
# No more un-resolved label (for now): time to reduce the shellcode
|
|
self._reduce_shellcode()
|
|
|
|
def add_delayed_jump(self, jump):
|
|
dst = jump.label
|
|
if dst in self.labels:
|
|
# Jump to already defined labels
|
|
# Nothing fancy: get offset of label and jump to it !
|
|
distance = self.size - self.labels[dst]
|
|
jump_instruction = jump.type(-distance)
|
|
self.computed_jump.append((self.size, self.labels[dst]))
|
|
return self.add_instruction(jump_instruction)
|
|
# Jump to undefined label
|
|
# Add label to expected ones
|
|
# Add jump info -> offset of jump | type
|
|
# Reserve space for call !
|
|
jump.offset = self.size
|
|
self.expected_labels.setdefault(dst, []).append(jump)
|
|
self.size += self.JUMP_SIZE
|
|
return
|
|
|
|
def _reduce_shellcode(self):
|
|
to_remove = [offset for offset, instr in self.instrs.items() if type(instr) == _NopArtifact]
|
|
while to_remove:
|
|
self._remove_nop_artifact(to_remove[0])
|
|
# _remove_nop_artifact will change the offsets of the nop
|
|
# Need to refresh these offset
|
|
to_remove = [offset for offset, instr in self.instrs.items() if type(instr) == _NopArtifact]
|
|
|
|
def _remove_nop_artifact(self, offset):
|
|
# Remove a NOP from the shellcode
|
|
for src, dst in self.computed_jump:
|
|
# Reduce size of Jump over the nop (both sens)
|
|
if src < offset < dst or dst < offset < src:
|
|
old_jmp = self.instrs[src]
|
|
old_jump_size = len(old_jmp.get_code())
|
|
if src < offset < dst:
|
|
new_jmp = type(old_jmp)(dst - src - 1)
|
|
else:
|
|
new_jmp = type(old_jmp)(dst - src + 1)
|
|
new_jmp_size = len(new_jmp.get_code())
|
|
if new_jmp_size > old_jump_size:
|
|
raise ValueError("Wtf jump of smaller size is bigger.. ABORT")
|
|
self.instrs[src] = new_jmp
|
|
# Add other _NopArtifact if jump instruction size is reduced
|
|
for i in range(old_jump_size - new_jmp_size):
|
|
self.instrs[src + new_jmp_size + i] = _NopArtifact()
|
|
|
|
# dec offset of all Label after the NOP
|
|
for name, labeloffset in self.labels.items():
|
|
if labeloffset > offset:
|
|
self.labels[name] = labeloffset - 1
|
|
|
|
# dec offset of all instr after the NOP
|
|
new_instr = {}
|
|
for instroffset, instr in self.instrs.items():
|
|
if instroffset == offset:
|
|
continue
|
|
if instroffset > offset:
|
|
instroffset -= 1
|
|
new_instr[instroffset] = instr
|
|
self.instrs = new_instr
|
|
# Update all computed jump
|
|
new_computed_jump = []
|
|
for src, dst in self.computed_jump:
|
|
if src > offset:
|
|
src -= 1
|
|
if dst > offset:
|
|
dst -= 1
|
|
new_computed_jump.append((src, dst))
|
|
self.computed_jump = new_computed_jump
|
|
# dec size of the shellcode
|
|
self.size -= 1
|
|
|
|
def merge_shellcode(self, other):
|
|
shared_labels = set(self.labels) & set(other.labels)
|
|
if shared_labels:
|
|
raise ValueError("Cannot merge shellcode: shared labels {0}".format(shared_labels))
|
|
for offset, instr in sorted(other.instrs.items()):
|
|
for label_name in [name for name, label_offset in other.labels.items() if label_offset == offset]:
|
|
self.add_instruction(Label(label_name))
|
|
self.add_instruction(instr)
|
|
|
|
def __iadd__(self, other):
|
|
if isinstance(other, MultipleInstr):
|
|
self.merge_shellcode(other)
|
|
elif isinstance(other, basestring):
|
|
self.assemble(other)
|
|
else:
|
|
self.add_instruction(other)
|
|
return self
|
|
|
|
def assemble(self, code):
|
|
for instr in assemble_instructions_generator(code):
|
|
self.add_instruction(instr)
|
|
|
|
|
|
def split_in_instruction(str):
|
|
for line in str.split("\n"):
|
|
if not line:
|
|
continue
|
|
for instr in line.split(";"):
|
|
if not instr:
|
|
continue
|
|
yield instr.strip()
|
|
|
|
def assemble_instructions_generator(str):
|
|
for instr in split_in_instruction(str):
|
|
data = instr.split(" ", 1)
|
|
mnemo, args_raw = data[0], data[1:]
|
|
try:
|
|
instr_object = globals()[mnemo.capitalize()]
|
|
except:
|
|
raise ValueError("Unknow mnemonic <{0}>".format(mnemo))
|
|
|
|
args = []
|
|
if args_raw:
|
|
for arg in args_raw[0].split(","):
|
|
arg = arg.strip()
|
|
if (arg[0] == "[" or arg[2:4] == ":[") and arg[-1] == "]":
|
|
arg = mem(arg)
|
|
else:
|
|
try:
|
|
arg = int(arg, 0)
|
|
except ValueError:
|
|
pass
|
|
args.append(arg)
|
|
yield instr_object(*args)
|
|
|
|
def assemble(str):
|
|
"""Play test"""
|
|
shellcode = MultipleInstr()
|
|
shellcode += str
|
|
return shellcode.get_code()
|
|
|
|
def shellcode(str):
|
|
shellcode = MultipleInstr()
|
|
shellcode += str
|
|
return shellcode
|
|
|
|
# IDA : import windows.native_exec.simple_x86 as x86
|
|
# IDA testing
|
|
|
|
try:
|
|
import midap
|
|
import idc
|
|
in_IDA = True
|
|
except ImportError:
|
|
in_IDA = False
|
|
|
|
|
|
if in_IDA:
|
|
def test_code():
|
|
s = MultipleInstr()
|
|
s += Mov("Eax", "ESI")
|
|
s += Inc("Ecx")
|
|
s += Dec("edi")
|
|
s += Ret()
|
|
return s
|
|
|
|
def reset():
|
|
idc.MakeUnknown(idc.MinEA(), 0x1000, 0)
|
|
for i in range(0x1000):
|
|
idc.PatchByte(idc.MinEA() + i, 0)
|
|
|
|
s = test_code()
|
|
|
|
def tst():
|
|
reset()
|
|
midap.here(idc.MinEA()).write(s.get_code())
|
|
idc.MakeFunction(idc.MinEA())
|