Commit Graph

3566 Commits

Author SHA1 Message Date
Giacomo Vercesi e4e259df3c Add MakeSegmentRef to pypeline 2025-12-10 15:05:53 +01:00
Giacomo Vercesi 3e37058899 Add LegacySegregateStackAccesses to pypeline 2025-12-10 15:05:53 +01:00
Giacomo Vercesi d664a59827 Add detect-stack-size to pypeline 2025-12-10 15:05:53 +01:00
Giacomo Vercesi 3a08f8713b Add SimplifySwitch to pypeline 2025-12-10 15:05:53 +01:00
Giacomo Vercesi c0e8c8fa09 Add PromoteStackPointer to pypeline 2025-12-10 15:05:53 +01:00
Giacomo Vercesi 10cc709098 Add InjectStackSizeProbesAtCallSites to pypeline 2025-12-10 15:05:53 +01:00
Giacomo Vercesi 0bc74e0234 Add PromoteInitCSVToUndef to pypeline 2025-12-10 15:05:53 +01:00
Giacomo Vercesi e13e5add06 Add RemoveLiftingArtifacts to pypeline 2025-12-10 15:05:53 +01:00
Giacomo Vercesi 35ef98e83f LLVMPipe: make passes key lowercase
Since the rest of the pypeline yaml file is lowercase, convert the
`Passes` key of the configuration used by `pure-llvm-passes-*` to
lowercase.
2025-12-10 15:05:53 +01:00
Giacomo Vercesi 19f67c8223 Introduce LLVMFunctionMixin
Add a mixin class for piperuns that work on an LLVM module and need
both the model function and the `llvm::Function`. Pipe that inherit this
mixin will receive both the model and LLVM function in the
`runOnLLVMFunction` method.
2025-12-10 15:05:53 +01:00
Giacomo Vercesi db94859401 Registrars: add Run suffix for piperuns
Change the `Register.*Pipe` functions to end in `Run` if the template
argument should be a pipe run. Also change the concepts `Is.*Pipe` to
also have the `Run` suffix if applicable.
2025-12-10 15:05:53 +01:00
Giacomo Vercesi 296eb9a76f Make SingleOutputPipe uniform to other piperuns
Make the interface required by `SingleOutputPipe` similar to other
piperuns by requiring a constructor, the use of `PipeRunArgument`s and
the implementation of a non-static `run` function.
2025-12-10 15:05:53 +01:00
Giacomo Vercesi 3556e9bfa7 Pipebox: reorder link_libraries 2025-12-10 15:05:53 +01:00
Lauri Vasama 21a51af54f Add immediate radix deduction pass 2025-12-05 19:53:41 +02:00
Lauri Vasama a882b245ba Add backend support for immediate radix attributes 2025-12-05 19:53:41 +02:00
Lauri Vasama 33450e9306 Add terminal-branch-complement-hoisting pass 2025-12-05 19:53:41 +02:00
Lauri Vasama 73d7a77442 Add expression rewrite pass 2025-12-05 19:53:41 +02:00
Lauri Vasama 0f04483517 Add statement rewrite pass 2025-12-05 19:53:41 +02:00
Lauri Vasama 448276915e Add label-merging pass 2025-12-05 19:53:41 +02:00
Lauri Vasama f2911da190 Add trivial-return-elimination pass 2025-12-05 19:53:41 +02:00
Lauri Vasama d4114ae188 Implement bit_cast in Clift backend 2025-12-05 19:53:41 +02:00
Lauri Vasama 58216deafd Add RewriteHelpers.h
Contains helpers for statement rewriting.
2025-12-05 19:53:41 +02:00
Lauri Vasama c835baf65a Add PatternRewriter.h
Contains APIs from upstream LLVM that are not yet present in the current
version, as well as helpers not present in upstream.

See upstream commit 42c31d8302ff8f716601df9c276a5cd9ace6b158.
2025-12-05 19:53:41 +02:00
Lauri Vasama ba945442d6 Add BlockStatementOp 2025-12-05 15:01:14 +02:00
Lauri Vasama 332fe51aa0 Fix pointer arithmetic legalization
Resizes the integer types involved in pointer arithmetic along with the
pointer types.
2025-12-05 15:01:14 +02:00
Lauri Vasama adcbdf4524 Add clift::getPrimitiveIntegerType 2025-12-05 15:01:14 +02:00
Lauri Vasama b43df10c4b Improve Clift legalization
Casts are no longer emitted for immediates in boolean-tested contexts.
2025-12-05 15:01:14 +02:00
Alessandro Di Federico 33e4957bb9 RemoveExtractValues: do not link to TypeNames 2025-12-03 17:59:19 +01:00
Alessandro Di Federico 54cbadfc0f ImportModelNamesPipe: use prototypeOrDefault 2025-12-03 17:59:19 +01:00
Alessandro Di Federico f281a12088 LocalVariableBuilder: less debug info checks 2025-12-03 17:59:19 +01:00
Alessandro Di Federico 1dff54ba60 Make new backend independent from the old one 2025-12-03 17:59:18 +01:00
Alessandro Di Federico 896bb8d523 Drop SegregateStackAccessesPass.h 2025-12-03 17:59:18 +01:00
Andrea Gussoni 646ad4f97a GenericRegion: improve Head election
The `Head` election now works in a bottom-up fashion (child regions are
processed before the parent ones), and ensures that the `Head` election
process is coherent across multiple nested regions.
This means that:
1) The late entries are coherent between the nested regions. If a node
   is selected as a late entry for a region, the parent region must
   follow this decision too.
2) If a node which is a `Head` candidate for a parent region, is
   selected as the `Head` for a child region, the same choice must be
   performed for the parent region too.
2025-12-03 16:37:17 +01:00
Pietro Fezzardi 2397b82bcd MakeSegmentRef: fix handling of constexpr casts 2025-11-28 16:14:02 +01:00
Pietro Fezzardi 8cec15cebc TypeSystemPrinter: fix port number without return
Before this commit the port number was incorrectly increased when there
were no arguments in a function type, causing edges to be routed in a
less accurate way.
This commit fixes the problem.
2025-11-28 16:05:58 +01:00
Pietro Fezzardi 0f99de99ff TypeSystemPrinter: order in and out edges
To make the whole graph more deterministic and more readable.
2025-11-28 16:05:58 +01:00
Pietro Fezzardi 83da56ea7a TypeSystemPrinter: set top level IDs
This uses the "rank=source" feature of graphviz, that allows to select
what are the nodes with mimimal rank in a graph.

We use this to mark all the nodes that represent functions and segments
so that the graph layout is more deterministic and readable across
multiple runs when the input Model is very similar.
2025-11-28 16:05:57 +01:00
Pietro Fezzardi 67245347a8 TypeSystemPrinter: refactor node name computation 2025-11-28 16:05:57 +01:00
Giacomo Vercesi fb97693df0 Lift: implement invalidate 2025-11-26 16:13:28 +01:00
Giacomo Vercesi b1b5778822 Add infrastructure for custom invalidation
Add infrastructure to pypeline to allow for pipes to provide custom
invalidation, by implementing an `invalidate` function.
2025-11-26 16:13:28 +01:00
Giacomo Vercesi 8cff10e13b Introduce analyses that manipulate the model
Add 4 analyses to the pipebox that allow setting and verifying the model
and its diffs.
2025-11-26 16:13:28 +01:00
Giacomo Vercesi ca3c5113d9 Add recompile-isolated to pypeline 2025-11-18 17:47:54 +01:00
Giacomo Vercesi 159ca6b965 Add LinkForTranslation to pypeline 2025-11-18 17:47:54 +01:00
Giacomo Vercesi af4b447f89 Add CompileRootModule to pypeline 2025-11-18 17:47:54 +01:00
Giacomo Vercesi 7462c2daeb Add LinkSupport to pypeline 2025-11-18 17:47:54 +01:00
Giacomo Vercesi d5aeb306f6 Add YieldAssembly to pypeline 2025-11-18 17:47:54 +01:00
Giacomo Vercesi a834f874c9 Add ProcessAssembly to pypeline 2025-11-18 17:47:54 +01:00
Giacomo Vercesi 080c5017f1 Add HexDump to pypeline 2025-11-18 17:47:54 +01:00
Giacomo Vercesi 77f925c792 Add PromoteCSVs to pypeline 2025-11-18 17:47:54 +01:00
Giacomo Vercesi a685cd1055 Add EnforceABI to pypeline 2025-11-18 17:47:54 +01:00