mirror of
https://github.com/revng/revng
synced 2026-06-21 14:07:57 +00:00
Andrea Gussoni
275 lines
6.1 KiB
LLVM
275 lines
6.1 KiB
LLVM
;
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; This file is distributed under the MIT License. See LICENSE.md for details.
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;
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; RUN: %revngopt %s -generic-region-info -debug-log=generic-region-info -o /dev/null |& FileCheck %s
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; while test
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define void @f(i32 noundef %a) {
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entry:
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br label %while.cond
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while.cond: ; preds = %while.body, %entry
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%cmp = icmp slt i32 %a, 10
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br i1 %cmp, label %while.body, label %while.end
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while.body: ; preds = %while.cond
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br label %while.cond
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while.end: ; preds = %while.cond
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ret void
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}
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; CHECK-LABEL: Generic Region Info Results:
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; CHECK: Region 0:
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; CHECK-NEXT: Elected head: while.cond
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; CHECK-NEXT: while.cond
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; CHECK-NEXT: while.body
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; do-while test
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define void @g(i32 noundef %a) {
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entry:
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br label %do.body
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do.body: ; preds = %do.cond, %entry
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br label %do.cond
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do.cond: ; preds = %do.body
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%cmp = icmp slt i32 %a, 10
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br i1 %cmp, label %do.body, label %do.end
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do.end: ; preds = %do.cond
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ret void
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}
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; CHECK-LABEL: Generic Region Info Results:
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; CHECK: Region 0:
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; CHECK-NEXT: Elected head: do.body
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; CHECK-NEXT: do.body
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; CHECK-NEXT: do.cond
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; nested whiles test
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define void @h(i32 noundef %a, i32 noundef %b) {
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entry:
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br label %while.cond
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while.cond: ; preds = %while.end, %entry
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%cmp = icmp slt i32 %a, 10
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br i1 %cmp, label %while.body, label %while.end6
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while.body: ; preds = %while.cond
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br label %while.cond1
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while.cond1: ; preds = %while.body3, %while.body
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%cmp2 = icmp slt i32 %b, 20
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br i1 %cmp2, label %while.body3, label %while.end
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while.body3: ; preds = %while.cond1
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br label %while.cond1
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while.end: ; preds = %while.cond1
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br label %while.cond
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while.end6: ; preds = %while.cond
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ret void
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}
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; CHECK-LABEL: Generic Region Info Results:
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; CHECK: Region 0:
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; CHECK-NEXT: Elected head: while.cond
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; CHECK-NEXT: while.cond
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; CHECK-NEXT: while.end
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; CHECK-NEXT: while.cond1
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; CHECK-NEXT: while.body3
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; CHECK-NEXT: while.body
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; CHECK: Region 1:
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; CHECK-NEXT: Elected head: while.cond1
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; CHECK-NEXT: while.cond1
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; CHECK-NEXT: while.body3
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; overlapping cycles test
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define void @i(i32 noundef %a) {
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entry:
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br label %while.cond
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while.cond: ; preds = %if.end5, %if.then, %entry
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%cmp = icmp slt i32 %a, 10
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br i1 %cmp, label %while.body, label %while.end
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while.body: ; preds = %while.cond
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br label %label
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label: ; preds = %if.then4, %while.body
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%cmp1 = icmp eq i32 %a, 5
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br i1 %cmp1, label %if.then, label %if.end
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if.then: ; preds = %label
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br label %while.cond
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if.end: ; preds = %label
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%cmp3 = icmp eq i32 %a, 6
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br i1 %cmp3, label %if.then4, label %if.end5
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if.then4: ; preds = %if.end
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br label %label
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if.end5: ; preds = %if.end
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br label %while.cond
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while.end: ; preds = %while.cond
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ret void
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}
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; CHECK-LABEL: Generic Region Info Results:
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; CHECK: Region 0:
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; CHECK-NEXT: Elected head: while.cond
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; CHECK-NEXT: while.cond
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; CHECK-NEXT: if.then
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; CHECK-NEXT: label
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; CHECK-NEXT: if.then4
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; CHECK-NEXT: if.end
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; CHECK-NEXT: while.body
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; CHECK-NEXT: if.end5
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; CHECK: Region 1:
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; CHECK-NEXT: Elected head: label
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; CHECK-NEXT: label
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; CHECK-NEXT: if.then4
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; CHECK-NEXT: if.end
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; diamond test
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define void @l(i32 noundef %a) #0 {
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entry:
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%cmp = icmp sgt i32 %a, 10
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br i1 %cmp, label %if.then, label %if.else
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if.then: ; preds = %entry
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br label %if.end
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if.else: ; preds = %entry
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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ret void
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}
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; CHECK-LABEL: Generic Region Info Results:
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; while self-loop test
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define void @m(i32 noundef %a) #0 {
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entry:
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br label %while.cond
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while.cond: ; preds = %while.body, %entry
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%cmp = icmp slt i32 %a, 10
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br i1 %cmp, label %while.body, label %while.end
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while.body: ; preds = %while.cond
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%cmp2 = icmp slt i32 %a, 20
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br i1 %cmp2, label %while.cond, label %while.body
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while.end: ; preds = %while.cond
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ret void
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}
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; CHECK-LABEL: Generic Region Info Results:
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; CHECK: Region 0:
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; CHECK-NEXT: Elected head: while.cond
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; CHECK-NEXT: while.cond
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; CHECK-NEXT: while.body
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; CHECK: Region 1:
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; CHECK-NEXT: Elected head: while.body
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; CHECK-NEXT: while.body
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; double edge test
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define void @n() #0 {
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block_a:
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br i1 undef, label %block_b, label %block_b
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block_b:
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ret void
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}
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; CHECK-LABEL: Generic Region Info Results:
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; double edge switch test
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define void @o() #0 {
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block_a:
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switch i32 undef, label %block_c [ i32 0, label %block_b
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i32 1, label %block_b ]
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block_b:
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br label %block_c
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block_c:
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ret void
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}
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; CHECK-LABEL: Generic Region Info Results:
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; multiple exit nodes test
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define void @p() #0 {
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block_a:
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br i1 undef, label %block_b, label %block_c
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block_b:
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ret void
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block_c:
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ret void
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}
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; CHECK-LABEL: Generic Region Info Results:
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; multiple exit nodes switch test
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define void @q() #0 {
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block_a:
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switch i32 undef, label %block_d [ i32 0, label %block_b
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i32 1, label %block_c ]
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block_b:
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ret void
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block_c:
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ret void
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block_d:
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ret void
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}
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; CHECK-LABEL: Generic Region Info Results:
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; no exit nodes test
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define dso_local void @r() #0 {
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block_a:
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br label %block_b
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block_b:
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br label %block_c
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block_c:
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br label %block_d
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block_d:
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br label %block_b
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}
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; CHECK-LABEL: Generic Region Info Results:
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; CHECK: Region 0:
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; CHECK-NEXT: Elected head: block_b
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; CHECK-NEXT: block_b
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; CHECK-NEXT: block_d
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; CHECK-NEXT: block_c
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