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https://github.com/revng/revng
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e84c76019a
The new option is `NoRegisterArgumentsCanComeAfterStackOnes` If it's set to `true`, then no register argument can follow any stack argument under the said abi, otherwise such "shuffling" of arguments is allowed.
67 lines
1.1 KiB
YAML
67 lines
1.1 KiB
YAML
#
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# This file is distributed under the MIT License. See LICENSE.md for details.
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#
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ABI: AAPCS
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ArgumentsArePositionBased: false
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OnlyStartDoubleArgumentsFromAnEvenRegister: true
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ArgumentsCanBeSplitBetweenRegistersAndStack: true
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NoRegisterArgumentsCanComeAfterStackOnes: true
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UsePointerToCopyForStackArguments: false
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CalleeIsResponsibleForStackCleanup: false
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StackAlignment: 4
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MaximumGPRsPerAggregateArgument: 4
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MaximumGPRsPerAggregateReturnValue: 1
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MaximumGPRsPerScalarArgument: 4
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MaximumGPRsPerScalarReturnValue: 4
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GeneralPurposeArgumentRegisters:
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- r0_arm
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- r1_arm
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- r2_arm
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- r3_arm
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GeneralPurposeReturnValueRegisters:
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- r0_arm
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- r1_arm
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- r2_arm
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- r3_arm
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VectorArgumentRegisters:
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- q0_arm
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- q1_arm
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- q2_arm
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- q3_arm
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VectorReturnValueRegisters:
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- q0_arm
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- q1_arm
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- q2_arm
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- q3_arm
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CalleeSavedRegisters:
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- r4_arm
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- r5_arm
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- r6_arm
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- r7_arm
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- r8_arm
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- r10_arm
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- r11_arm
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- q4_arm
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- q5_arm
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- q6_arm
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- q7_arm
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ReturnValueLocationRegister: r0_arm
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ScalarTypes:
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- Size: 1
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- Size: 2
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- Size: 4
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- Size: 8
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- Size: 16
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FloatingPointScalarTypes:
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- Size: 2
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- Size: 4
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- Size: 8
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