From bd780817f7a9458aa155d2d1378bb0ed7e8fe0af Mon Sep 17 00:00:00 2001 From: Daniel Lemire Date: Thu, 2 Jul 2020 15:33:36 -0400 Subject: [PATCH] Update performance.md --- doc/performance.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/performance.md b/doc/performance.md index 640bebd66..c3bf7a96e 100644 --- a/doc/performance.md +++ b/doc/performance.md @@ -169,4 +169,4 @@ On some Intel processors, using SIMD instructions in a sustained manner on the s - [Whenever 512-bit AVX-512 instructions are used](https://lemire.me/blog/2018/09/07/avx-512-when-and-how-to-use-these-new-instructions/). - Whenever heavy 256-bit or wider instructions are used. Heavy instructions are those involving floating point operations or integer multiplications (since these execute on the floating point unit). -The simdjson library does not currently support AVX-512 instructions and it does not make use of heavy 256-bit instructions. Thus there should be no downclocking due to simdjson on recent processors. You may still be worried about which SIMD instruction set is used by simdjson. Thankfully, [you can always determine and change which architecture-specific implementation is used](implementation-selection.md). Thus even if your CPU supports AVX2, you do not need to use AVX2. You are in control. +The simdjson library does not currently support AVX-512 instructions and it does not make use of heavy 256-bit instructions. We do use vectorized multiplications, but only using 128-bit registers. Thus there should be no downclocking due to simdjson on recent processors. You may still be worried about which SIMD instruction set is used by simdjson. Thankfully, [you can always determine and change which architecture-specific implementation is used](implementation-selection.md). Thus even if your CPU supports AVX2, you do not need to use AVX2. You are in control.