 SaberAlterr
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7068894be3
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[RISC-V Vector] Add RVV Backend Registration (#2430)
* WIP: initial RVV implementation
Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn>
* Fix issue with SIMDJSON_CONDITIONAL_INCLUDE in rvv/implementation.h
Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn>
* drop RISC-V V-extension auto-detection in cmake
- Remove CMake logic that adds -DSIMDJSON_IS_RVV=1.
- Let SIMDJSON_IS_RVV be determined by portability.h.
- Translate placeholder comment to English.
Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn>
* fixing amalgamation.
Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn>
* adding base
Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn>
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Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn>
Co-authored-by: Daniel Lemire <daniel@lemire.me>
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2025-09-14 08:14:41 -06:00 |
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