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https://github.com/simdjson/simdjson
synced 2026-06-08 17:27:07 +00:00
Daniel Lemire
e8f370b085
* Add cascadelake implementation, which use AVX512 Intrinsics to optimize performance(#1811) Co-authored-by: mellonyou <fangzheng.zhang@intel.com> Co-authored-by: wanweiqiangintel <weiqiang.wan@intel.com>
26 lines
731 B
C++
26 lines
731 B
C++
#ifndef SIMDJSON_ICELAKE_BITMASK_H
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#define SIMDJSON_ICELAKE_BITMASK_H
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namespace simdjson {
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namespace SIMDJSON_IMPLEMENTATION {
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namespace {
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//
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// Perform a "cumulative bitwise xor," flipping bits each time a 1 is encountered.
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//
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// For example, prefix_xor(00100100) == 00011100
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//
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simdjson_really_inline uint64_t prefix_xor(const uint64_t bitmask) {
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// There should be no such thing with a processor supporting avx2
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// but not clmul.
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__m128i all_ones = _mm_set1_epi8('\xFF');
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__m128i result = _mm_clmulepi64_si128(_mm_set_epi64x(0ULL, bitmask), all_ones, 0);
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return _mm_cvtsi128_si64(result);
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}
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} // unnamed namespace
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} // namespace SIMDJSON_IMPLEMENTATION
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} // namespace simdjson
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#endif // SIMDJSON_ICELAKE_BITMASK_H
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