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https://github.com/simdjson/simdjson
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45 lines
1.3 KiB
C++
45 lines
1.3 KiB
C++
#ifndef SIMDJSON_ARM64_BITMASK_H
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#define SIMDJSON_ARM64_BITMASK_H
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#ifndef SIMDJSON_CONDITIONAL_INCLUDE
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#include "simdjson/arm64/base.h"
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#endif // SIMDJSON_CONDITIONAL_INCLUDE
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namespace simdjson {
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namespace arm64 {
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namespace {
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//
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// Perform a "cumulative bitwise xor," flipping bits each time a 1 is encountered.
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//
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// For example, prefix_xor(00100100) == 00011100
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//
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simdjson_inline uint64_t prefix_xor(uint64_t bitmask) {
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/////////////
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// We could do this with PMULL, but it is apparently slow.
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//
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//#ifdef __ARM_FEATURE_CRYPTO // some ARM processors lack this extension
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//return vmull_p64(-1ULL, bitmask);
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//#else
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// Analysis by @sebpop:
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// When diffing the assembly for src/stage1_find_marks.cpp I see that the eors are all spread out
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// in between other vector code, so effectively the extra cycles of the sequence do not matter
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// because the GPR units are idle otherwise and the critical path is on the FP side.
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// Also the PMULL requires two extra fmovs: GPR->FP (3 cycles in N1, 5 cycles in A72 )
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// and FP->GPR (2 cycles on N1 and 5 cycles on A72.)
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///////////
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bitmask ^= bitmask << 1;
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bitmask ^= bitmask << 2;
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bitmask ^= bitmask << 4;
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bitmask ^= bitmask << 8;
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bitmask ^= bitmask << 16;
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bitmask ^= bitmask << 32;
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return bitmask;
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}
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} // unnamed namespace
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} // namespace arm64
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} // namespace simdjson
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#endif
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