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https://github.com/simdjson/simdjson
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SaberAlterr
11d9dbb7b7
* Fix riscv intrinsics header missing SIMDJSON_CONDITIONAL_INCLUDE guard Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn> * Fix riscv intrinsics header missing SIMDJSON_CONDITIONAL_INCLUDE guard Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn> * Implement simd8/simd8x64 with RVV intrinsics and fallback bitmanipulation Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn> * Fix missing SIMDJSON_CONDITIONAL_INCLUDE guard Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn> * Fix missing SIMDJSON_CONDITIONAL_INCLUDE guard Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn> --------- Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn>
14 lines
419 B
C
14 lines
419 B
C
#define SIMDJSON_IMPLEMENTATION rvv
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// include RVV intrinsics and definitions
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#include <riscv_vector.h>
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#include "simdjson/rvv/base.h"
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#include "simdjson/rvv/intrinsics.h"
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#include "simdjson/rvv/bitmanipulation.h"
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#include "simdjson/rvv/bitmask.h"
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#include "simdjson/rvv/numberparsing_defs.h"
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#include "simdjson/rvv/simd.h"
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#include "simdjson/rvv/stringparsing_defs.h"
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#define SIMDJSON_SKIP_BACKSLASH_SHORT_CIRCUIT 1
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