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simdjson-simdjson/include
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SaberAlterr 896fb5d6a5 [RISC-V Vector] Add initial 128-bit SIMD layer and fix intrinsics header (#2469) 
* Fix riscv intrinsics header missing SIMDJSON_CONDITIONAL_INCLUDE guard

Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn>

* Fix riscv intrinsics header missing SIMDJSON_CONDITIONAL_INCLUDE guard

Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn>

* Fix intrinsics header and add 128-bit SIMD layer

Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn>

---------

Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn>
2025-09-24 14:48:59 -04:00
..
simdjson
[RISC-V Vector] Add initial 128-bit SIMD layer and fix intrinsics header (#2469)
2025-09-24 14:48:59 -04:00
simdjson.h
This is a small reorg of the new convert code so that we only expose 'simdjson::from' as experimental (#2418)
2025-08-15 15:13:36 -04:00