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https://github.com/simdjson/simdjson
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Daniel Lemire
75178b65e0
expectation is that frequency throttling in these cases is less of a concern for most users. To be clear, older Intel processors with AVX-512 instructions (such as cascade lake or skylake-x) will not be able to run AVX-512 instructions. 2. We adopt a much faster bitset decoding technique described in the following blog post: https://lemire.me/blog/2022/05/10/faster-bitset-decoding-using-intel-avx-512/ Credit to : Kim Walisch and Jatin Bhateja 3. The compress method which is used by _mm512_mask_compressstoreu_epi8 should be a massive performance gain but also a drastic reduction in code complexity. 4. I try to catch up on crediting valued contributors.
46 lines
782 B
Plaintext
46 lines
782 B
Plaintext
# contributors (in no particular order)
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Thomas Navennec
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Kai Wolf
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Tyler Kennedy
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Frank Wessels
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George Fotopoulos
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Heinz N. Gies
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Emil Gedda
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Wojciech Muła
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Georgios Floros
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Dong Xie
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Nan Xiao
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Egor Bogatov
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Jinxi Wang
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Luiz Fernando Peres
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Wouter Bolsterlee
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Anish Karandikar
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Reini Urban
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Tom Dyson
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Ihor Dotsenko
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Alexey Milovidov
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Chang Liu
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Sunny Gleason
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John Keiser
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Zach Bjornson
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Vitaly Baranov
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Juho Lauri
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Michael Eisel
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Io Daza Dillon
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Paul Dreik
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Jeremie Piotte
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Matthew Wilson
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Dušan Jovanović
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Matjaž Ostroveršnik
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Nong Li
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Furkan Taşkale
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Brendan Knapp
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Danila Kutenin
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Pavel Pavlov
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Hao Chen
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Nicolas Boyer
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Kim Walisch and Jatin Bhateja (AVX-512 bitset decoder)
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Eric Zhang (AVX-512 kernel)
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# if you have contributed to the project and your name does not
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# appear in this list, please let us know!
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