mirror of
https://github.com/vivisect/vivisect
synced 2026-06-08 18:04:23 +00:00
James Gross
a7b5f8deef
Massive cutover to python3 (baseline is 3.9.1, but is also tested/working on 3.7.x). This merge is a breaking change for any downstream consumers, as the python 2->3 strings/bytes change is central. Most APIs should still work roughly as intended, as I didn't majorly re-organize the codebase, so most APIs live where they lived before. But a changelog/migration guide will be included in the next PR for this. This PR will constitute most if not all of the v1.0.0 release that is forthcoming soon.
122 lines
3.4 KiB
Python
122 lines
3.4 KiB
Python
import binascii
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from vstruct import VStruct
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from vstruct.primitives import *
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class v_bits(v_number):
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def __init__(self, width):
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v_number.__init__(self)
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self._vs_bitwidth = int(width)
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def vsSetValue(self, value):
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'''
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override base because we are not using the min or max val.
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'''
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self._vs_value = value
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def vsSetBitWidth(self, width):
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self._vs_bitwidth = width
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class VBitField(VStruct):
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'''
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A VStruct *like* field which may contain v_bits
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children. To all VStruct related operations, we are
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a primitive, but we do have internal structure.
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Example:
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see vstruct/defs/swf.py
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NOTE: this object will pad itself to byte aligned bounds
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'''
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def __init__(self):
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VStruct.__init__(self)
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def vsIsPrim(self):
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return True
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def vsAddField(self, name, value):
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if not isinstance(value, v_bits):
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raise Exception('VBitField *must* use v_bits() kids!')
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return VStruct.vsAddField(self, name, value)
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def vsGetPrintInfo(self, offset=0, indent=0, top=True):
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ret = []
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if top:
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ret.append((offset, indent, self._vs_name, self))
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indent += 1
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bitoff = 0
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for fname,field in self.vsGetFields():
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# use vsSetBitWidth(0) to disable fields
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if field._vs_bitwidth == 0:
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continue
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bitname = '%s[%d:%d]' % (fname,bitoff,bitoff + field._vs_bitwidth)
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ret.append( (offset, indent, bitname, field) )
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bitoff += field._vs_bitwidth
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return ret
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def __len__(self):
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bits = sum([ f._vs_bitwidth for (n,f) in self.vsGetFields() ])
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bittobyte,bitoff = divmod(bits,8)
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if bitoff:
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bittobyte += 1
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return bittobyte
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def vsParse(self, bytez, offset=0):
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bitoff = 0
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for fname,field in self.vsGetFields():
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# use vsSetBitWidth(0) to disable fields
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if field._vs_bitwidth == 0:
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continue
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# adjust forward from last fields bits % 8
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startbyte,startbit = divmod(bitoff,8)
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#offset += bittobyte
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endbyte,endbit = divmod(bitoff + field._vs_bitwidth, 8)
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# if we have an endbit remainder, we need to grab
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# an additional byte...
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endround = 0
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endshift = 0
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if endbit:
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endshift = (8-endbit)
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endround = 1
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fieldbytes = bytez[offset + startbyte:offset+endbyte+endround]
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rawint = int(binascii.hexlify(fieldbytes), 16)
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if endshift:
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#if bitshift:
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rawint >>= endshift
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rawint &= (2**field._vs_bitwidth)-1
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field.vsSetValue(rawint)
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bitoff += field._vs_bitwidth
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self._vsFireCallbacks(fname)
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offbytes,offbits = divmod(bitoff,8)
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offset += offbytes
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# mop up any remaining bits int a byte boundary
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if offbits:
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offset += 1
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return offset
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def vsEmit(self):
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valu = 0
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width = 0
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for name,field in self.vsGetFields():
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width += field._vs_bitwidth
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valu = ( valu << field._vs_bitwidth ) | field._vs_value
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bytelen,bitrem = divmod(width,8)
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if bitrem:
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bytelen += 1
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valu <<= ( 8 - bitrem )
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return binascii.unhexlify(('%.' + str(bytelen*2) + 'x') % valu)
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