Initial lifting POC

2026-06-21 13:43:42 +00:00 · 2026-05-09 15:09:52 +02:00
parent d0c719bc98
commit beec01d84e
7 changed files with 381 additions and 14 deletions
@@ -1 +1,7 @@
 __pycache__/
+*.id0
+*.id1
+*.id2
+*.nam
+*.til
+*.i64
@@ -0,0 +1,21 @@
+# binaryshield-lifter
+
+## Requirements
+
+- [uv](https://astral.sh/uv)
+- [CMake](https://cmake.org)
+- LLVM 21+
+
+## Building
+
+You need LLVM 21 or higher. Before running the first build, allow CMake to find LLVM:
+
+```bash
+export LLVM_ROOT=$(brew --prefix llvm)
+```
+
+Set up the virtual environment:
+
+```bash
+uv sync
+```
@@ -5,7 +5,13 @@ from pathlib import Path

 import icicle
 import pefile
-from capstone import CS_ARCH_X86, CS_MODE_64, Cs
+from capstone import (
+    CS_ARCH_X86,
+    CS_MODE_64,
+    CS_MODE_32,
+    Cs,
+    CsInsn,
+)


 FUNCTION_ADDRESS = 0x00000001400016D0
@@ -45,7 +51,7 @@ class PEmulator:
        self.stack_size = 0x10000
        self.stack_base = self.allocate(self.stack_size)

-        self.md = Cs(CS_ARCH_X86, CS_MODE_64)
+        self.md = Cs(CS_ARCH_X86, CS_MODE_64 if arch_name == "x86_64" else CS_MODE_32)

    def page_align(self, size: int) -> int:
        return (size + 0xFFF) & ~0xFFF
@@ -161,24 +167,25 @@ class PEmulator:
        self.ic.reg_write("RCX", rcx)
        self.ic.reg_write("RIP", callee)

+    def cs_disasm(self, address: int, code: bytes) -> CsInsn:
+        for insn in self.md.disasm(code, address, count=1):  # ty: ignore[missing-argument, invalid-argument-type]
+            return insn
+        raise ValueError(f"Failed to disassemble {code.hex()}@{hex(address)}")
+
    def disassemble_one(self, address: int) -> tuple[str, str, int]:
        # x86-64 instructions are at most 15 bytes. Try shorter reads if close to
        # an unmapped/protected page boundary.
-        last_error = None
        for size in range(15, 0, -1):
            try:
                code = self.ic.mem_read(address, size)
-            except Exception as exc:  # icicle.MemoryException in normal failure cases
-                last_error = exc
+            except Exception:  # icicle.MemoryException in normal failure cases
                continue
-            insns = list(self.md.disasm(code, address, count=1))
-            if insns:
-                insn = insns[0]
-                text = insn.mnemonic
-                if insn.op_str:
-                    text += f" {insn.op_str}"
-                return insn.mnemonic, text, insn.size
-        raise RuntimeError(f"Could not disassemble at {address:#x}: {last_error}")
+            insn = self.cs_disasm(address, code)
+            text = insn.mnemonic
+            if insn.op_str:
+                text += f" {insn.op_str}"
+            return insn.mnemonic, text, insn.size
+        raise RuntimeError("disassembly failed")

    def trace_call(
        self,
@@ -0,0 +1,222 @@
+from contextlib import contextmanager
+
+from capstone import (
+    CS_ARCH_X86,
+    CS_MODE_64,
+    CS_OP_REG,
+    CS_OP_MEM,
+    CS_OP_IMM,
+    Cs,
+    CsInsn,
+)
+from capstone.x86 import X86Op
+from capstone.x86_const import (
+    X86_INS_ADD,
+    X86_INS_AND,
+    X86_INS_CMOVNE,
+    X86_INS_INC,
+    X86_INS_JMP,
+    X86_INS_LEA,
+    X86_INS_MOV,
+    X86_INS_NOP,
+    X86_INS_OR,
+    X86_INS_POP,
+    X86_INS_POPFQ,
+    X86_INS_PUSH,
+    X86_INS_PUSHFQ,
+    X86_INS_RET,
+    X86_INS_SUB,
+    X86_INS_XOR,
+)
+
+import llvm
+
+
+class Lifter:
+    def __init__(self, module: llvm.Module):
+        self.cs = Cs(CS_ARCH_X86, CS_MODE_64)
+        self.cs.detail = True
+        self.module = module
+        self.context = module.context
+        types = self.context.types
+        self.types = types
+
+        self.reg_sizes = {
+            "rax": 64,
+            "rbx": 64,
+            "rcx": 64,
+            "rdx": 64,
+            "rsi": 64,
+            "rdi": 64,
+            "rsp": 64,
+            "rbp": 64,
+            "r8": 64,
+            "r8": 64,
+            "r10": 64,
+            "r11": 64,
+            "r12": 64,
+            "r13": 64,
+            "r14": 64,
+            "r15": 64,
+            "rip": 64,
+            "cf": 8,
+            "zf": 8,
+            "sf": 8,
+            "of": 8,
+            "pf": 8,
+            "af": 8,
+        }
+        self.reg_types = {
+            name: self.types.int_n(size) for name, size in self.reg_sizes.items()
+        }
+        self.reg_ptrs: dict[str, llvm.Value] = {}
+        self.state_ty = types.struct(self.reg_types.values(), name="State")
+        self.function: llvm.Function | None = None
+        self.lifted_ty = types.function(types.void, [types.ptr, types.ptr])
+
+    @staticmethod
+    @contextmanager
+    def create(module_name="lifted"):
+        with llvm.create_context() as context:
+            with context.create_module(module_name) as module:
+                yield Lifter(module)
+
+    def cs_disasm(self, address: int, code: bytes) -> CsInsn:
+        for insn in self.cs.disasm(code, address, count=1):  # ty: ignore[missing-argument, invalid-argument-type]
+            return insn
+        raise ValueError(f"Failed to disassemble {code.hex()}@{hex(address)}")
+
+    def switch_function(self, name: str):
+        fn = self.module.get_function(name)
+        if fn is None:
+            fn = self.module.add_function(name, self.lifted_ty)
+            fn.linkage = llvm.Linkage.Internal
+            memory, state = fn.params
+            memory.name = "memory"
+            state.name = "state"
+
+            entry = fn.append_basic_block("initialize")
+            assert fn.last_basic_block == entry
+            with entry.create_builder() as builder:
+                for i, name in enumerate(self.reg_sizes.keys()):
+                    reg_ptr = builder.struct_gep(self.state_ty, state, i, name)
+                    self.reg_ptrs[name] = reg_ptr
+        else:
+            self.reg_ptrs = {}
+            entry = fn.entry_block
+            assert fn.last_basic_block == entry
+            assert entry.name == "initialize", (
+                "unexpected basic block for lifted function"
+            )
+            for insn in entry.instructions:
+                if (
+                    insn.opcode == llvm.Opcode.GetElementPtr
+                    and insn.gep_source_element_type == self.state_ty
+                ):
+                    assert insn.name in self.reg_types, "unexpected GEP"
+                self.reg_ptrs[insn.name] = insn
+
+        self.function = fn
+
+    def _reg_read(self, builder: llvm.Builder, name: str):
+        reg_ptr = self.reg_ptrs[name]
+        return builder.load(self.reg_types[name], reg_ptr)
+
+    def _reg_write(self, builder: llvm.Builder, name: str, value: llvm.Value):
+        reg_ptr = self.reg_ptrs[name]
+        # TODO: zero extend/cast?
+        builder.store(value, reg_ptr)
+
+    def _operand_read(
+        self, builder: llvm.Builder, insn: CsInsn, index: int
+    ) -> llvm.Value:
+        op: X86Op = insn.operands[index]
+        if op.type == CS_OP_REG:
+            name: str = insn.reg_name(op.reg)  # pyright: ignore[reportAssignmentType]
+            return self._reg_read(builder, name)
+        if op.type == CS_OP_IMM:
+            # TODO: is the sign handled correctly?
+            return self.types.int_n(op.size * 8).constant(op.imm)
+        if op.type == CS_OP_MEM:
+            raise NotImplementedError("CS_OP_MEM")
+        assert False, "unreachable"
+
+    def _operand_write(
+        self, builder: llvm.Builder, insn: CsInsn, index: int, value: llvm.Value
+    ):
+        op: X86Op = insn.operands[index]
+        if op.type == CS_OP_REG:
+            name: str = insn.reg_name(op.reg)  # pyright: ignore[reportAssignmentType]
+            self._reg_write(builder, name, value)
+        elif op.type == CS_OP_IMM:
+            raise ValueError("Cannot write to CS_OP_IMM")
+        elif op.type == CS_OP_MEM:
+            raise NotImplementedError("CS_OP_MEM")
+
+    def _lift_add(self, builder: llvm.Builder, insn: CsInsn):
+        op2 = self._operand_read(builder, insn, 1)
+        op1 = self._operand_read(builder, insn, 0)
+        result = builder.add(op1, op2)
+        self._operand_write(builder, insn, 0, result)
+        # TODO: flags
+
+    def _mem_write(self, builder: llvm.Builder, addr: llvm.Value, value: llvm.Value):
+        assert self.function, "call switch first"
+        memory = self.function.get_param(0)
+        ptr = builder.gep(self.types.i8, memory, [addr])
+        builder.store(value, ptr)
+
+    def _lift_push(self, builder: llvm.Builder, insn: CsInsn):
+        value = self._operand_read(builder, insn, 0)
+        rsp = self._reg_read(builder, "rsp")
+        rsp_sub = builder.sub(rsp, self.types.i64.constant(8))
+        self._reg_write(builder, "rsp", rsp_sub)
+        self._mem_write(builder, rsp_sub, value)
+
+    def lift_insn(self, address: int, code: bytes):
+        assert self.function, f"You need to call switch_function first!"
+
+        # Create a new block to lift the instruction
+        # TODO: how to handle conditional jumps?
+        last_block = self.function.last_basic_block
+        insn_block = self.function.append_basic_block(f"lifted_{hex(address)}")
+        with last_block.create_builder() as builder:
+            builder.br(insn_block)
+
+        insn = self.cs_disasm(address, code)
+        print(insn.mnemonic, insn.op_str)
+
+        with insn_block.create_builder() as builder:
+            self._reg_write(builder, "rip", self.types.i64.constant(address))
+            if insn.id == X86_INS_ADD:
+                self._lift_add(builder, insn)
+            elif insn.id == X86_INS_PUSH:
+                self._lift_push(builder, insn)
+            else:
+                raise NotImplementedError(
+                    f"Instruction not implemented: {insn.mnemonic}"
+                )
+        print(insn_block)
+
+    def lift_end(self):
+        assert self.function
+        with self.function.last_basic_block.create_builder() as builder:
+            builder.ret_void()
+
+
+def main():
+    with Lifter.create() as lifter:
+        lifter.switch_function("handler1")
+        lifter.switch_function("handler1")
+        lifter.lift_insn(0x14001603E, bytes.fromhex("4D 01 F5"))
+        lifter.lift_insn(0x140017A41, bytes.fromhex("68 8F 67 01 00"))
+
+        lifter.lift_end()
+
+        lifter.module.verify_or_raise()
+        print(lifter.module)
+    pass
+
+
+if __name__ == "__main__":
+    main()
@@ -5,5 +5,15 @@ requires-python = ">=3.12"
 dependencies = [
    "capstone>=5.0.7",
    "icicle-emu>=0.0.11",
+    "llvm-nanobind",
    "pefile>=2024.8.26",
 ]
+
+[tool.uv.sources]
+llvm-nanobind = { git = "https://github.com/LLVMParty/llvm-nanobind" }
+
+[dependency-groups]
+dev = [
+    "ruff>=0.15.12",
+    "ty>=0.0.34",
+]
@@ -0,0 +1,33 @@
+.binshld:0000000140017A41                         sub_140017A41   proc near               ; CODE XREF: sub_1400016D0↑j
+.binshld:0000000140017A41 68 8F 67 01 00                          push    1678Fh
+.binshld:0000000140017A46 E9 B5 E5 FF FF                          jmp     sub_140016000
+.binshld:0000000140017A46                         sub_140017A41   endp
+
+.binshld:0000000140016000 41 57                                   push    r15
+.binshld:0000000140016002 41 56                                   push    r14
+.binshld:0000000140016004 41 55                                   push    r13
+.binshld:0000000140016006 41 54                                   push    r12
+.binshld:0000000140016008 41 53                                   push    r11
+.binshld:000000014001600A 41 52                                   push    r10
+.binshld:000000014001600C 41 51                                   push    r9
+.binshld:000000014001600E 41 50                                   push    r8
+.binshld:0000000140016010 55                                      push    rbp
+.binshld:0000000140016011 57                                      push    rdi
+.binshld:0000000140016012 56                                      push    rsi
+.binshld:0000000140016013 52                                      push    rdx
+.binshld:0000000140016014 51                                      push    rcx
+.binshld:0000000140016015 53                                      push    rbx
+.binshld:0000000140016016 50                                      push    rax
+.binshld:0000000140016017 9C                                      pushfq
+.binshld:0000000140016018 49 89 E7                                mov     r15, rsp
+.binshld:000000014001601B 48 81 EC 00 01 00 00                    sub     rsp, 100h
+.binshld:0000000140016022 65 4C 8B 34 25 60 00 00                 mov     r14, gs:60h
+.binshld:0000000140016022 00
+.binshld:000000014001602B 4D 8B 76 10                             mov     r14, [r14+10h]
+.binshld:000000014001602F 4C 89 B4 24 88 00 00 00                 mov     [rsp+180h+var_F8], r14
+.binshld:0000000140016037 45 8B AF 80 00 00 00                    mov     r13d, [r15+80h]
+.binshld:000000014001603E 4D 01 F5                                add     r13, r14
+.binshld:0000000140016041 41 8B 45 00                             mov     eax, [r13+0]
+.binshld:0000000140016045 49 83 C5 04                             add     r13, 4
+.binshld:0000000140016049 4C 01 F0                                add     rax, r14
+.binshld:000000014001604C FF E0                                   jmp     rax
@@ -1,5 +1,5 @@
 version = 1
-revision = 2
+revision = 3
 requires-python = ">=3.12"

 [[package]]
@@ -9,16 +9,30 @@ source = { virtual = "." }
 dependencies = [
    { name = "capstone" },
    { name = "icicle-emu" },
+    { name = "llvm-nanobind" },
    { name = "pefile" },
 ]

+[package.dev-dependencies]
+dev = [
+    { name = "ruff" },
+    { name = "ty" },
+]
+
 [package.metadata]
 requires-dist = [
    { name = "capstone", specifier = ">=5.0.7" },
    { name = "icicle-emu", specifier = ">=0.0.11" },
+    { name = "llvm-nanobind", git = "https://github.com/LLVMParty/llvm-nanobind" },
    { name = "pefile", specifier = ">=2024.8.26" },
 ]

+[package.metadata.requires-dev]
+dev = [
+    { name = "ruff", specifier = ">=0.15.12" },
+    { name = "ty", specifier = ">=0.0.34" },
+]
+
 [[package]]
 name = "capstone"
 version = "5.0.7"
@@ -50,6 +64,11 @@ wheels = [
    { url = "https://files.pythonhosted.org/packages/5c/3d/98030b959250f5223d697964d987dfa39c65fe4cd4671bb4c00d72738af6/icicle_emu-0.0.11-cp38-abi3-win_amd64.whl", hash = "sha256:94e0da6502ae19ba89497ced98fe0f9e881b13deaf070caaca9a4a552e4e9aa6", size = 3643928, upload-time = "2025-11-06T15:12:57.104Z" },
 ]

+[[package]]
+name = "llvm-nanobind"
+version = "0.0.1"
+source = { git = "https://github.com/LLVMParty/llvm-nanobind#a681b3656e868fc085ce377fbe395007ff991716" }
+
 [[package]]
 name = "pefile"
 version = "2024.8.26"
@@ -58,3 +77,52 @@ sdist = { url = "https://files.pythonhosted.org/packages/03/4f/2750f7f6f025a1507
 wheels = [
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 ]
+
+[[package]]
+name = "ruff"
+version = "0.15.12"
+source = { registry = "https://pypi.org/simple" }
+sdist = { url = "https://files.pythonhosted.org/packages/99/43/3291f1cc9106f4c63bdce7a8d0df5047fe8422a75b091c16b5e9355e0b11/ruff-0.15.12.tar.gz", hash = "sha256:ecea26adb26b4232c0c2ca19ccbc0083a68344180bba2a600605538ce51a40a6", size = 4643852, upload-time = "2026-04-24T18:17:14.305Z" }
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