mirror of
https://github.com/angr/pyvex
synced 2026-06-21 13:47:01 +00:00
Audrey Dutcher
0f32e9dbb7
* plugins 2: no more plugins * homebrew arches * lint * I think this is related to thumb mode? * Remove archinfo from tests * Remove archinfo from setup.cfg * Fix fuzzing * Fix ARM32 -> ARM * Fix missing closing brace in PyvexArch.__repr__ * Get register offsets directly from vex_ffi * Fix test cases failures related to little endian instructions * Resore riscv64le * Also in __init__.py * Add subregister map * Fix another test * Don't treat rMSR r value as a vex offset, treat it as a register * Fix remaining failing test cases * Add some backwards compatibility for register indicies * Revert _lookup_register to original behaviour * Fix arch name * Fix registers with vex_name * Fix LDM instruction using register numbers --------- Co-authored-by: Kevin Phoenix <kevin@kphoenix.us>
22 lines
638 B
Python
22 lines
638 B
Python
import pyvex
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def test_mips32_unconditional_jumps():
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# 0040000c: 10000002 ; <input:28> beq $zero, $zero, LABEL_ELSE_IF
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# 00400010: 00000000 ; <input:31> sll $zero, $zero, 0
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# 00400014: 08100012 ; <input:34> j LABEL_DONE
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# 00400018: <LABEL_ELSE_IF> ; <input:37> LABEL_ELSE_IF:
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irsb = pyvex.IRSB(
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data=(b"\x10\x00\x00\x02" b"\x00\x00\x00\x00"),
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mem_addr=0x40000C,
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arch=pyvex.ARCH_MIPS32_BE,
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num_inst=2,
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opt_level=0,
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)
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assert type(irsb.next) is pyvex.expr.Const
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assert irsb.next.con.value == 0x400018
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if __name__ == "__main__":
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test_mips32_unconditional_jumps()
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