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https://github.com/angr/pyvex
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Brian Caswell
6ef0032cf4
* pyvex_c: widen HashHW value slot to ULong HashHW (lifted from libvex/ir_opt.c) caches (IR-temp -> resolved constant) bindings during data_ref extraction. Values were typed HWord (= unsigned long, host-pointer-width). On 32-bit hosts that's 4 bytes, but the guest can be 64-bit (AMD64, AArch64), so cached guest pointers were silently truncated. Symptom on wasm32-emscripten with an AMD64 guest: pyvex.lift returns data_addr=0x6320 for a load whose actual target is 0x100006320 (high 32 bits dropped). Native x86-64 SysV hides the bug because long is 64-bit there. Fix: store HashHW values as ULong unconditionally. Keys are pyvex-internal IR-temp identifiers and can stay HWord. Adds tests/test_data_refs_64bit_target.py to lock in the expected value. Fixes #539 * [pre-commit.ci] auto fixes from pre-commit.com hooks for more information, see https://pre-commit.ci * tests: drop archinfo dep, add class docstring archinfo isn't a pyvex test dependency, so the new test failed to collect on all CI runners. Use the bundled pyvex.ARCH_AMD64 constant instead. Also add the class docstring that the ecosystem lint flagged. --------- Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com> Co-authored-by: Brian Caswell <brian@demoray.net>