mirror of
https://github.com/asmjit/asmjit
synced 2026-06-08 13:13:30 +00:00
kobalicek
b56f4176cb
* Denested src folder to root, renamed testing to asmjit-testing
* Refactored how headers are included into <asmjit/...> form. This
is necessary as compilers would never simplify a path once a ..
appears in include directory - then paths such as ../core/../core
appeared in asserts, which was ugly
* Moved support utilities into asmjit/support/... (still included
by asmjit/core.h for convenience and compatibility)
* Added CMakePresets.json for making it easy to develop AsmJit
* Reworked CMakeLists to be shorter and use CMake option(),
etc... This simplifies it and makes it using more standard
features
* ASMJIT_EMBED now creates asmjit_embed INTERFACE library,
which is accessible via asmjit::asmjit target - this simplifies
embedding and makes it the same as library targets from a CMake
perspective
* Removed ASMJIT_DEPS - this is now provided by cmake target
aliases - 'asmjit::asmjit' so users should not need this variable
* Changed meaning of ASMJIT_LIBS - this now contains only AsmJit
dependencies without asmjit::asmjit target alias. Don't rely on
ASMJIT_LIBS anymore as it's only used internally
* Removed ASMJIT_NO_DEPRECATED option - AsmJit is not going
to provide controllable deprecations in the future
* Removed ASMJIT_NO_VALIDATION in favor of ASMJIT_NO_INTROSPECTION,
which now controls query, features, and validation API presence
* Removed ASMJIT_DIR option - it was never really needed
* Removed AMX_TRANSPOSE feature from instruction database (X86).
Intel has removed it as well, so it's a feature that won't
be siliconized
253 lines
7.5 KiB
C++
253 lines
7.5 KiB
C++
// This file is part of AsmJit project <https://asmjit.com>
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//
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// See <asmjit/core.h> or LICENSE.md for license and copyright information
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// SPDX-License-Identifier: Zlib
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#include <asmjit/core/api-build_p.h>
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#if !defined(ASMJIT_NO_AARCH64)
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#include <asmjit/core/cpuinfo.h>
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#include <asmjit/core/misc_p.h>
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#include <asmjit/support/support_p.h>
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#include <asmjit/arm/a64instapi_p.h>
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#include <asmjit/arm/a64instdb_p.h>
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#include <asmjit/arm/a64operand.h>
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ASMJIT_BEGIN_SUB_NAMESPACE(a64)
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namespace InstInternal {
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// a64::InstInternal - Text
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// ========================
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#ifndef ASMJIT_NO_TEXT
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Error inst_id_to_string(InstId inst_id, InstStringifyOptions options, String& output) noexcept {
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uint32_t real_id = inst_id & uint32_t(InstIdParts::kRealId);
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if (ASMJIT_UNLIKELY(!Inst::is_defined_id(real_id))) {
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return make_error(Error::kInvalidInstruction);
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}
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return InstNameUtils::decode(InstDB::_inst_name_index_table[real_id], options, InstDB::_inst_name_string_table, output);
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}
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InstId string_to_inst_id(const char* s, size_t len) noexcept {
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if (ASMJIT_UNLIKELY(!s)) {
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return BaseInst::kIdNone;
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}
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if (len == SIZE_MAX) {
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len = strlen(s);
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}
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if (len == 0u || len > InstDB::_inst_name_index.max_name_length) {
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return BaseInst::kIdNone;
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}
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return InstNameUtils::find_instruction(s, len, InstDB::_inst_name_index_table, InstDB::_inst_name_string_table, InstDB::_inst_name_index);
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}
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#endif // !ASMJIT_NO_TEXT
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// a64::InstInternal - Validate
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// ============================
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#ifndef ASMJIT_NO_INTROSPECTION
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ASMJIT_FAVOR_SIZE Error validate(const BaseInst& inst, const Operand_* operands, size_t op_count, ValidationFlags validation_flags) noexcept {
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// TODO:
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Support::maybe_unused(inst, operands, op_count, validation_flags);
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return Error::kOk;
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}
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#endif // !ASMJIT_NO_INTROSPECTION
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// a64::InstInternal - QueryRWInfo
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// ===============================
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#ifndef ASMJIT_NO_INTROSPECTION
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struct InstRWInfoData {
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uint8_t rwx[Globals::kMaxOpCount];
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};
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static const InstRWInfoData inst_rw_info_table[] = {
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#define R uint8_t(OpRWFlags::kRead)
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#define W uint8_t(OpRWFlags::kWrite)
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#define X uint8_t(OpRWFlags::kRW)
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{{ R, R, R, R, R, R }}, // kRWI_R
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{{ R, W, R, R, R, R }}, // kRWI_RW
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{{ R, X, R, R, R, R }}, // kRWI_RX
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{{ R, R, W, R, R, R }}, // kRWI_RRW
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{{ R, W, X, R, R, R }}, // kRWI_RWX
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{{ W, R, R, R, R, R }}, // kRWI_W
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{{ W, R, W, R, R, R }}, // kRWI_WRW
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{{ W, R, X, R, R, R }}, // kRWI_WRX
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{{ W, R, R, W, R, R }}, // kRWI_WRRW
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{{ W, R, R, X, R, R }}, // kRWI_WRRX
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{{ W, W, R, R, R, R }}, // kRWI_WW
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{{ X, R, R, R, R, R }}, // kRWI_X
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{{ X, R, X, R, R, R }}, // kRWI_XRX
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{{ X, X, R, R, X, R }}, // kRWI_XXRRX
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{{ W, R, R, R, R, R }}, // kRWI_LDn
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{{ R, W, R, R, R, R }}, // kRWI_STn
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{{ R, R, R, R, R, R }} // kRWI_TODO
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#undef R
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#undef W
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#undef X
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};
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static const uint8_t element_type_size_table[8] = { 0, 1, 2, 4, 8, 4, 4, 0 };
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Error query_rw_info(const BaseInst& inst, const Operand_* operands, size_t op_count, InstRWInfo* out) noexcept {
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// Get the instruction data.
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uint32_t real_id = inst.inst_id() & uint32_t(InstIdParts::kRealId);
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if (ASMJIT_UNLIKELY(!Inst::is_defined_id(real_id))) {
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return make_error(Error::kInvalidInstruction);
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}
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out->_inst_flags = InstRWFlags::kNone;
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out->_op_count = uint8_t(op_count);
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out->_rm_feature = 0;
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out->_extra_reg.reset();
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out->_read_flags = CpuRWFlags::kNone; // TODO: [ARM] Read PSTATUS.
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out->_write_flags = CpuRWFlags::kNone; // TODO: [ARM] Write PSTATUS
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const InstDB::InstInfo& inst_info = InstDB::_inst_info_table[real_id];
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const InstRWInfoData& rw_info = inst_rw_info_table[inst_info.rw_info_index()];
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if (inst_info.has_flag(InstDB::kInstFlagConsecutive) && op_count > 2) {
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for (uint32_t i = 0; i < op_count; i++) {
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OpRWInfo& op = out->_operands[i];
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const Operand_& src_op = operands[i];
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if (!src_op.is_reg_or_mem()) {
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op.reset();
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continue;
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}
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OpRWFlags rw_flags = i < op_count - 1 ? (OpRWFlags)rw_info.rwx[0] : (OpRWFlags)rw_info.rwx[1];
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op._op_flags = rw_flags & ~(OpRWFlags::kZExt);
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op._phys_id = Reg::kIdBad;
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op._rm_size = 0;
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op._reset_reserved();
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uint64_t r_byte_mask = op.is_read() ? 0xFFFFFFFFFFFFFFFFu : 0x0000000000000000u;
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uint64_t w_byte_mask = op.is_write() ? 0xFFFFFFFFFFFFFFFFu : 0x0000000000000000u;
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op._read_byte_mask = r_byte_mask;
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op._write_byte_mask = w_byte_mask;
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op._extend_byte_mask = 0;
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op._consecutive_lead_count = 0;
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if (src_op.is_reg()) {
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if (i == 0) {
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op._consecutive_lead_count = uint8_t(op_count - 1);
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}
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else {
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op.add_op_flags(OpRWFlags::kConsecutive);
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}
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}
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else {
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const Mem& mem_op = src_op.as<Mem>();
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if (mem_op.has_base()) {
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op.add_op_flags(OpRWFlags::kMemBaseRead);
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if ((mem_op.has_index() || mem_op.has_offset()) && mem_op.is_pre_or_post()) {
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op.add_op_flags(OpRWFlags::kMemBaseWrite);
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}
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}
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if (mem_op.has_index()) {
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op.add_op_flags(OpRWFlags::kMemIndexRead);
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}
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}
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}
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}
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else {
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for (uint32_t i = 0; i < op_count; i++) {
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OpRWInfo& op = out->_operands[i];
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const Operand_& src_op = operands[i];
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if (!src_op.is_reg_or_mem()) {
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op.reset();
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continue;
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}
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OpRWFlags rw_flags = (OpRWFlags)rw_info.rwx[i];
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op._op_flags = rw_flags & ~(OpRWFlags::kZExt);
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op._phys_id = Reg::kIdBad;
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op._rm_size = 0;
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op._reset_reserved();
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uint64_t r_byte_mask = op.is_read() ? 0xFFFFFFFFFFFFFFFFu : 0x0000000000000000u;
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uint64_t w_byte_mask = op.is_write() ? 0xFFFFFFFFFFFFFFFFu : 0x0000000000000000u;
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op._read_byte_mask = r_byte_mask;
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op._write_byte_mask = w_byte_mask;
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op._extend_byte_mask = 0;
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op._consecutive_lead_count = 0;
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if (src_op.is_reg()) {
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if (src_op.as<Vec>().has_element_index()) {
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// Only part of the vector is accessed if element index [] is used.
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VecElementType element_type = src_op.as<Vec>().element_type();
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uint32_t element_index = src_op.as<Vec>().element_index();
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uint32_t element_size = element_type_size_table[size_t(element_type)];
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uint64_t access_mask = uint64_t(Support::lsb_mask<uint32_t>(element_size)) << (element_index * element_size);
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op._read_byte_mask &= access_mask;
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op._write_byte_mask &= access_mask;
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}
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// TODO: [ARM] RW info is not finished.
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}
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else {
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const Mem& mem_op = src_op.as<Mem>();
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if (mem_op.has_base()) {
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op.add_op_flags(OpRWFlags::kMemBaseRead);
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if ((mem_op.has_index() || mem_op.has_offset()) && mem_op.is_pre_or_post()) {
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op.add_op_flags(OpRWFlags::kMemBaseWrite);
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}
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}
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if (mem_op.has_index()) {
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op.add_op_flags(OpRWFlags::kMemIndexRead);
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}
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}
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}
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}
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return Error::kOk;
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}
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#endif // !ASMJIT_NO_INTROSPECTION
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// a64::InstInternal - QueryFeatures
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// =================================
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#ifndef ASMJIT_NO_INTROSPECTION
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Error query_features(const BaseInst& inst, const Operand_* operands, size_t op_count, CpuFeatures* out) noexcept {
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// TODO: [ARM] QueryFeatures not implemented yet.
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Support::maybe_unused(inst, operands, op_count, out);
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return Error::kOk;
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}
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#endif // !ASMJIT_NO_INTROSPECTION
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} // {InstInternal}
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// a64::InstInternal - Unit
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// ========================
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#if defined(ASMJIT_TEST)
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UNIT(arm_inst_api_text) {
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// TODO:
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}
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#endif
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ASMJIT_END_SUB_NAMESPACE
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#endif // !ASMJIT_NO_AARCH64
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