msp430: move jit

miasm2/analysis/machine.py

@@ -57,7 +57,7 @@ class Machine(object):
             from miasm2.arch.msp430.disasm import dis_msp430 as dis_engine
             from miasm2.arch.msp430.arch import mn_msp430 as mn
             from miasm2.arch.msp430.ira import ir_a_msp430 as ira
-            from miasm2.jitter.jitload import jitter_msp430 as jitter
+            from miasm2.arch.msp430.jit import jitter_msp430 as jitter
             from miasm2.analysis.gdbserver import GdbServer_msp430 as gdbserver
         elif machine_name == "mips32b":
             from miasm2.arch.mips32.disasm import dis_mips32b as dis_engine

miasm2/arch/msp430/arch.py

@@ -583,3 +583,4 @@ offimm = bs(l=10, cls=(msp430_offs,), fname="offs")
 bs_f2_jcc = bs_name(l=3, name={'jnz': 0, 'jz': 1, 'jnc': 2, 'jc': 3, 'jn': 4,
                                'jge': 5, 'jl': 6, 'jmp': 7})
 addop("f2_3", [bs('001'), bs_f2_jcc, offimm])
+

miasm2/arch/msp430/jit.py

@@ -0,0 +1,43 @@
+from miasm2.jitter.jitload import jitter
+from miasm2.core import asmbloc
+from miasm2.core.utils import *
+from miasm2.arch.arm.sem import ir_arm
+
+import logging
+
+log = logging.getLogger('jit_msp430')
+hnd = logging.StreamHandler()
+hnd.setFormatter(logging.Formatter("[%(levelname)s]: %(message)s"))
+log.addHandler(hnd)
+log.setLevel(logging.CRITICAL)
+
+class jitter_msp430(jitter):
+
+    def __init__(self, *args, **kwargs):
+        from miasm2.arch.msp430.sem import ir_msp430
+        sp = asmbloc.asm_symbol_pool()
+        jitter.__init__(self, ir_msp430(sp), *args, **kwargs)
+        self.my_ir.jit_pc = self.my_ir.arch.regs.PC
+
+    def vm_push_uint16_t(self, v):
+        regs = self.cpu.vm_get_gpreg()
+        regs['SP'] -= 2
+        self.cpu.vm_set_gpreg(regs)
+        self.vm.vm_set_mem(regs['SP'], pck16(v))
+
+    def vm_pop_uint16_t(self):
+        regs = self.cpu.vm_get_gpreg()
+        x = upck16(self.vm.vm_get_mem(regs['SP'], 2))
+        regs['SP'] += 2
+        self.cpu.vm_set_gpreg(regs)
+        return x
+
+    def get_stack_arg(self, n):
+        regs = self.cpu.vm_get_gpreg()
+        x = upck16(self.vm.vm_get_mem(regs['SP'] + 2 * n, 2))
+        return x
+
+    def init_run(self, *args, **kwargs):
+        jitter.init_run(self, *args, **kwargs)
+        self.cpu.PC = self.pc
+

miasm2/jitter/jitload.py

@@ -853,34 +853,3 @@ def vm2pe(myjit, fname, libs=None, e_orig=None,
     # generation
     open(fname, 'w').write(str(mye))
 
-
-class jitter_msp430(jitter):
-
-    def __init__(self, *args, **kwargs):
-        from miasm2.arch.msp430.sem import ir_msp430
-        sp = asmbloc.asm_symbol_pool()
-        jitter.__init__(self, ir_msp430(sp), *args, **kwargs)
-        self.my_ir.jit_pc = self.my_ir.arch.regs.PC
-
-    def vm_push_uint16_t(self, v):
-        regs = self.cpu.vm_get_gpreg()
-        regs['SP'] -= 2
-        self.cpu.vm_set_gpreg(regs)
-        self.vm.vm_set_mem(regs['SP'], pck16(v))
-
-    def vm_pop_uint16_t(self):
-        regs = self.cpu.vm_get_gpreg()
-        x = upck16(self.vm.vm_get_mem(regs['SP'], 2))
-        regs['SP'] += 2
-        self.cpu.vm_set_gpreg(regs)
-        return x
-
-    def get_stack_arg(self, n):
-        regs = self.cpu.vm_get_gpreg()
-        x = upck16(self.vm.vm_get_mem(regs['SP'] + 2 * n, 2))
-        return x
-
-    def init_run(self, *args, **kwargs):
-        jitter.init_run(self, *args, **kwargs)
-        self.cpu.PC = self.pc
-