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https://github.com/chipsec/chipsec
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Merge pull request #41 from tweksteen/test_dump_spi_reviewed
Add test for SPI dump
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@@ -29,3 +29,46 @@ class TestHelper(oshelper.Helper):
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return 0x16008086
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else:
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raise Exception("Unexpected PCI read")
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class SPIHelper(TestHelper):
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"""Generic SPI emulation
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Two regions are defined:
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* The flash descriptor [0x1000, 0x1FFF]
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* The BIOS image [0x2000, 0x2FFF]
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"""
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RCBA_ADDR = 0xFED0000
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SPIBAR_ADDR = RCBA_ADDR + 0x3800
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SPIBAR_END = SPIBAR_ADDR + 0x200
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FRAP = SPIBAR_ADDR + 0x50
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FREG0 = SPIBAR_ADDR + 0x54
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LPC_BRIDGE_DEVICE = (0, 0x1F, 0)
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def read_pci_reg(self, bus, device, function, address, size):
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if (bus, device, function) == self.LPC_BRIDGE_DEVICE:
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if address == 0xF0:
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return self.RCBA_ADDR
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elif address == 0xDC:
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return 0xDEADBEEF
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else:
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raise Exception("Unexpected PCI read")
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else:
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return super(SPIHelper, self).read_pci_reg(bus, device,
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function,
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address, size)
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def read_mmio_reg(self, pa, size):
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if pa == self.FREG0:
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return 0x00010001
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elif pa == self.FREG0 + 4:
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return 0x00020002
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elif pa == self.FRAP:
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return 0xEEEEEEEE
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elif pa >= self.SPIBAR_ADDR and pa < self.SPIBAR_END:
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return 0x0
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else:
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raise Exception("Unexpected address")
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def write_mmio_reg(self, pa, size, value):
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if pa < self.SPIBAR_ADDR or pa > self.SPIBAR_END:
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raise Exception("Write to outside of SPIBAR")
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@@ -197,44 +197,21 @@ class TestChipsecUtil(unittest.TestCase):
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Validates that BC and FRAP are correctly read.
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"""
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class SPIHelper(mock_helper.TestHelper):
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RCBA_ADDR = 0xFED0000
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SPIBAR_ADDR = RCBA_ADDR + 0x3800
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SPIBAR_END = SPIBAR_ADDR + 0x200
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FRAP = SPIBAR_ADDR + 0x50
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FREG0 = SPIBAR_ADDR + 0x54
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LPC_BRIDGE_DEVICE = (0, 0x1F, 0)
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def read_pci_reg(self, bus, device, function, address, size):
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if (bus, device, function) == self.LPC_BRIDGE_DEVICE:
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if address == 0xF0:
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return self.RCBA_ADDR
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elif address == 0xDC:
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return 0xDEADBEEF
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else:
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raise Exception("Unexpected PCI read")
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else:
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return super(SPIHelper, self).read_pci_reg(bus, device,
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function,
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address, size)
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def read_mmio_reg(self, pa, size):
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if pa == self.FREG0:
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return 0x11111111
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elif pa == self.FREG0 + 4:
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return 0x22222222
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elif pa == self.FRAP:
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return 0xEEEEEEEE
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elif pa >= self.SPIBAR_ADDR and pa < self.SPIBAR_END:
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return 0x0
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else:
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raise Exception("Unexpected address")
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def write_mmio_reg(self, pa, size, value):
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if pa < self.SPIBAR_ADDR or pa > self.SPIBAR_END:
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raise Exception("Write to outside of SPIBAR")
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self._chipsec_util("spi info", SPIHelper)
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self._chipsec_util("spi info", mock_helper.SPIHelper)
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self.assertIn("BC = 0xDEADBEEF", self.log)
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self.assertIn("FRAP = 0xEEEEEEEE", self.log)
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def test_spi_dump(self):
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"""Test to verify the ouput of 'spi dump'.
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Validates that the flash size is correctly calculated (based on the
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assumption that the BIOS region is last) and match it with the output
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file size.
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"""
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fileno, rom_file = tempfile.mkstemp()
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os.close(fileno)
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self._chipsec_util("spi dump %s" % rom_file, mock_helper.SPIHelper)
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self.assertIn("Dumping 0x00003000 bytes", self.log)
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self.assertEqual(os.stat(rom_file).st_size, 0x3000)
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os.remove(rom_file)
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