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Fix modules debugenabled and me_mfg_mode

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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
This commit is contained in:
Nathaniel Mitchell
2025-02-10 14:56:46 -08:00
parent 7725ebe841
commit 7d459745ac
2 changed files with 42 additions and 32 deletions
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chipsec/modules/common/debugenabled.py
+38 -29
View File
@@ -52,6 +52,10 @@ class debugenabled(BaseModule):
def __init__(self):
BaseModule.__init__(self)
self.cs.set_scope({
"ECTRL": "8086.DCI.ECTRL",
"IA32_DEBUG_INTERFACE": "8086.MSR.IA32_DEBUG_INTERFACE"
})
self.is_enable_set = False
self.is_debug_set = False
self.is_lock_set = True
@@ -69,11 +73,15 @@ class debugenabled(BaseModule):
TestFail = ModuleResult.PASSED
self.logger.log('')
self.logger.log('[*] Checking DCI register status')
ectrl = self.cs.register.read('ECTRL')
HDCIEN = self.cs.register.get_field('ECTRL', ectrl, 'ENABLE') == 1
if self.logger.VERBOSE:
self.cs.register.print('ECTRL', ectrl)
if HDCIEN:
ectrl = self.cs.register.get_list_by_name('ECTRL')
# ectrl = self.cs.register.read('ECTRL')
ectrl.read_and_verbose_print()
hdcien_mask = ectrl[0].get_field_mask('ENABLE', True)
# HDCIEN = self.cs.register.get_field('ECTRL', ectrl, 'ENABLE') == 1
if ectrl.is_all_field_value(ectrl[0].get_field('ENABLE'), 'ENABLE'):
self.logger.log_good('CPU debug enable is set consistently')
if ectrl.is_any_value(hdcien_mask, 'ENABLE'):
self.logger.log_bad('DCI Debug is enabled')
TestFail = ModuleResult.FAILED
self.result.setStatusBit(self.result.status.DEBUG_FEATURE)
@@ -85,33 +93,34 @@ class debugenabled(BaseModule):
self.logger.log('')
self.logger.log('[*] Checking IA32_DEBUG_INTERFACE MSR status')
TestFail = ModuleResult.PASSED
for tid in range(self.cs.hals.Msr.get_cpu_thread_count()):
dbgiface = self.cs.register.read('IA32_DEBUG_INTERFACE', tid)
IA32_DEBUG_INTERFACE_DEBUGENABLE = self.cs.register.get_field('IA32_DEBUG_INTERFACE', dbgiface, 'ENABLE') == 1
IA32_DEBUG_INTERFACE_DEBUGELOCK = self.cs.register.get_field('IA32_DEBUG_INTERFACE', dbgiface, 'LOCK') == 1
IA32_DEBUG_INTERFACE_DEBUGEOCCURED = self.cs.register.get_field('IA32_DEBUG_INTERFACE', dbgiface, 'DEBUG_OCCURRED') == 1
dbg_regs = self.cs.register.get_list_by_name('IA32_DEBUG_INTERFACE')
dbg_regs.read_and_verbose_print()
enable_mask = dbg_regs[0].get_field_mask('ENABLE', True)
occured_mask = dbg_regs[0].get_field_mask('DEBUG_OCCURRED', True)
if self.logger.VERBOSE:
self.cs.register.print('IA32_DEBUG_INTERFACE', dbgiface)
if IA32_DEBUG_INTERFACE_DEBUGENABLE:
self.logger.log_bad('CPU debug enable requested by software.')
self.is_enable_set = True
TestFail = ModuleResult.FAILED
self.result.setStatusBit(self.result.status.DEBUG_FEATURE)
if not IA32_DEBUG_INTERFACE_DEBUGELOCK:
self.logger.log_bad('CPU debug interface is not locked.')
self.is_lock_set = False
TestFail = ModuleResult.FAILED
self.result.setStatusBit(self.result.status.LOCKS)
if IA32_DEBUG_INTERFACE_DEBUGEOCCURED:
self.logger.log_important('Debug Occurred bit set in IA32_DEBUG_INTERFACE MSR')
self.is_debug_set = True
self.result.setStatusBit(self.result.status.DEBUG_FEATURE)
if TestFail == ModuleResult.PASSED:
TestFail = ModuleResult.WARNING
if dbg_regs.is_all_field_value(dbg_regs[0].get_field('ENABLE'), 'ENABLE'):
self.logger.log_good('CPU debug enable is set consitently')
if dbg_regs.is_any_field_value(enable_mask, 'ENABLE'):
self.logger.log_bad('CPU debug enable requested by software.')
self.is_enable_set = True
TestFail = ModuleResult.FAILED
self.result.setStatusBit(self.result.status.DEBUG_FEATURE)
if dbg_regs.is_all_field_value(dbg_regs[0].get_field('LOCK'), 'LOCK'):
self.logger.log_good('CPU debug lock is set consitently')
if dbg_regs.is_any_field_value(0, 'LOCK'):
self.logger.log_bad('CPU debug interface is not locked.')
self.is_lock_set = False
TestFail = ModuleResult.FAILED
self.result.setStatusBit(self.result.status.LOCKS)
if dbg_regs.is_any_field_value(occured_mask, 'DEBUG_OCCURRED'):
self.logger.log_important('Debug Occurred bit set in IA32_DEBUG_INTERFACE MSR')
self.is_debug_set = True
self.result.setStatusBit(self.result.status.DEBUG_FEATURE)
if TestFail == ModuleResult.PASSED:
self.logger.log_good('CPU debug interface state is correct.')
TestFail = ModuleResult.WARNING
if TestFail == ModuleResult.PASSED:
self.logger.log_good('CPU debug interface state is correct.')
return TestFail
def run(self, module_argv: List[str]) -> int:
chipsec/modules/common/me_mfg_mode.py
+4 -3
View File
@@ -102,12 +102,13 @@ class me_mfg_mode(BaseModule):
def __init__(self):
BaseModule.__init__(self)
self.cs.set_scope({
"MEI1": "8086.MEI1",
"HFS": "8086.MEI1.HFS",
"MEI1": "8086", # TODO: Must not have .MEI1 at the end. The ending item must only be in the key.
"HFS": "8086.MEI1",
})
def is_supported(self) -> bool:
if self.cs.device.get_bus('MEI1') and self.cs.device.is_enabled('MEI1'):
self.mei1_dev = self.cs.device.get_obj('MEI1')
if self.mei1_dev.instances and self.mei1_dev.instances[0].bus is not None:
return True
else:
self.logger.log_important('MEI1 not enabled. Skipping module.')