Commit Graph

219 Commits

Author SHA1 Message Date
Nathaniel Mitchell cf8f5c9c82 Rework spi_descriptor.py hal to use simple in-mem registers 2026-05-26 11:15:30 -07:00
dscott90 32e2ba62c3 Add firmware data retrieval (#2710)
* Add firmware data retrieval
* Apply suggestions from code review
* Remove FW info native versions from linux/win helpers and added results to info module

---------

Signed-off-by: Dan Scott <dan.scott@intel.com>
Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>
Co-authored-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2026-03-31 13:54:29 -07:00
Nathaniel Mitchell 1259e568de Change all HAL objects in cs.hals to be lowercase
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2025-12-09 13:49:37 -08:00
Nathaniel Mitchell ee551aa168 Populate lists for -p and --pch
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2025-12-09 10:17:11 -08:00
brentholtsclaw 447b6f2689 Update functionality which interfaces with parsers
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
2025-07-23 15:09:44 -07:00
Nathaniel Mitchell db92baec59 Fix up unit tests part 1
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2025-03-10 09:06:35 -07:00
Nathaniel Mitchell a032f04630 Update haldata and msr hal/cmd/tests
Change haldata to use cpuid mfgstr
Update MSR hal/cmd/tests

Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2025-02-18 12:53:25 -08:00
Nathaniel Mitchell 8a0b58e72d HAL Update - Enable multitenant HALs
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2025-02-18 11:34:35 -08:00
Nathaniel Mitchell 4487649f76 initial commit of cfg changes
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2025-02-18 10:51:49 -08:00
Nathaniel Mitchell 28e768b28c Misc fixes
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-12-03 12:50:38 -08:00
Nathaniel Mitchell f7409804b4 HAL Update - Enable multitenant HALs
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-12-03 12:50:36 -08:00
Nathaniel Mitchell cef932ed1d Post platformdetect updates
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-12-03 12:50:36 -08:00
Nathaniel Mitchell 21ab099704 initial commit of cfg changes
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-12-03 12:50:35 -08:00
Nathaniel Mitchell 7c64276210 Post platformdetect updates
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-12-03 12:50:35 -08:00
Nathaniel Mitchell 6aecea8c43 Post platformdetect updates
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-12-03 12:50:35 -08:00
Nathaniel Mitchell 847f02daa1 initial commit of cfg changes
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-12-03 12:50:34 -08:00
coudrant 7247978cfb Initial submission of AMD common modules (#2343)
* Initial submission of AMD common modules

* Corrected Copyright and Email for AMD modules.  Major fixes to spectre module.  Timeout added to PSP.  Added rom_armor.

* Corrected Copyright and Email for AMD modules.  Major fixes to spectre module.  Timeout added to PSP.  Added rom_armor.

* Corrected Platform Configuration.  Corrected cpu_info for Intel.

* Corrected register checks in spectre module

* Comestic changes to strix.xml. Code quality improvements to psp and smm_addr.  smm_base is redundant and removed

* Corrected smm_addr use of SMMMASK.  Added PATCH_LEVEL.  Added psp to chipset.

* Cleaned up results.id smm_addr.py

* <sku code> now matches <configuration> in strix.xml
2024-10-30 13:49:20 -07:00
Nathaniel Mitchell c196004a2e Fix loading to run some utiles that do not require cfg/driver
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-09-19 23:59:50 -07:00
Dan Scott 0e8192cfd0 Move files to library folder 2024-03-22 14:26:59 -07:00
Dan Scott a933b1337d Update references to functions in new library files 2024-03-22 14:26:59 -07:00
Dan Scott e569136c9b Refactor chipset.py 2024-03-22 14:26:59 -07:00
Nathaniel Mitchell 9bf2ab67c5 Add reg name to error when msr read fails
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-02-21 16:39:13 -08:00
Nathaniel Mitchell 105a222c37 Fix issues with mmio list command
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-01-31 16:34:24 -08:00
Nathaniel Mitchell e1d9465b79 Print pci devices when using verbose output
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-01-08 16:36:57 -08:00
Dan Scott b59238f032 Session 1 extractions 2023-11-20 16:38:35 -08:00
Nathaniel Mitchell f005fba0c6 Make sure DID/VID is printed when platform is unknown
And fixes unit tests

Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-11-13 16:36:49 -08:00
Nathaniel Mitchell cda2f448ac Fix the issue with the bus lists
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-09-15 10:07:44 -07:00
Nathaniel Mitchell 3c35aee789 Update bus matching check in _process_pci_dev
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-09-07 16:48:55 -07:00
Nicolas Iooss 9a0f04e2a1 Import modules traceback and errno when they are needed
When loading the kernel module fails on Linux, `chipsec_util.py`
raises an error in

    logger().log_debug(traceback.format_exc())

because `traceback` was not imported.

Fix this issue by importing the missing modules `traceback` and `errno`.
While at it, import `traceback` too in other files where it was missing.

Signed-off-by: Nicolas Iooss <nicolas.iooss_git@polytechnique.org>
2023-09-06 16:37:59 -07:00
Nathaniel Mitchell 757e1f0434 Print all devices on bus 0 with fun 0 when pch is not detected
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-08-21 16:36:31 -07:00
Nathaniel Mitchell 6bbe67a7e6 Update lock_check_cmd to poke 'cs.consistency_checking'
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-08-15 16:39:22 -07:00
Dan Scott 009622740d Update config parsing
Signed-off-by: Dan Scott <dan.scott@intel.com>
2023-07-28 09:34:00 -07:00
Nathaniel Mitchell 96d5409688 Update BaseCommand, chipsec_util with new util structure
Additional changes to enhance utils usage

Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-07-27 11:39:28 -07:00
Nathaniel Mitchell 27ee5eeb66 Clean up helper create/start/stop/delete functions
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-07-19 16:33:59 -07:00
Nathaniel Mitchell 190655b290 Fixup how -i, -n and --skip_config are used
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-07-05 16:36:58 -07:00
Sara Batllori 9b2e491597 Add return codes mode option to main and util
Signed-off-by: Sara Batllori <sara.batllori@intel.com>
2023-06-27 09:30:04 -07:00
Frinzell, Aaron 41ecf2cdb1 Implement basehelper.py as an ABC
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2023-06-23 08:27:17 -07:00
Nicolas Iooss 98925eac10 Read the AMD LPC revision ID using the correct BDF address
On AMD, the "PCH" is the LPC device on PCI 0:14.3. According to "PPR for
AMD Family 17h Model 18h B1. 55570-B1 Rev 3.16 - Apr 14, 2021."
available on
https://www.amd.com/en/support/tech-docs/processor-programming-reference-ppr-for-amd-family-17h-model-18h-revision-b1
the low byte at D14F3x008 (bus 0 device 14 function 3 offset 8) is the
RevisionID of this device.

Using 0:1F.0 to read the RID in `Chipset.detect_platform` is likely to
be a bug from commit 2691f50bae ("Detect PCH based on platform vendor
ID"), which introduced AMD support in this function. Fix this by using
`bus, dev, fun` to read `pch_rid`.

Signed-off-by: Nicolas Iooss <nicolas.iooss_git@polytechnique.org>
2023-06-12 16:43:48 -07:00
Nicolas Iooss 1d4e2c2482 Fix Chipset.set_control call to write_register_field
`Chipset.set_control` calls:

    self.write_register_field(reg, field, control_value, cpu_thread)

But `write_register_field` is defined as:

    def write_register_field(self, reg_name, field_name, field_value, preserve_field_position=False, cpu_thread=0):

So variable `cpu_thread` is given to parameter `preserve_field_position`
instead of parameter `cpu_thread`.

Fix this by using `cpu_thread=cpu_thread` syntax in the call.

This bug was found while adding type hints to `chipset`. Mypy reported:

    Argument 4 to "write_register_field" of "Chipset" has incompatible type "int"; expected "bool"

Signed-off-by: Nicolas Iooss <nicolas.iooss_git@polytechnique.org>
2023-06-05 16:42:39 -07:00
Nathaniel Mitchell 099bbdbdfa Add basic init to Chipset object if only helper is wanted
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-06-05 16:41:39 -07:00
Nicolas Iooss 72121ae8a2 Make chipsec.init() resilient to platform with unknown VID/DID
If the vendor ID or the device ID returned by `detect_platform()` is not
known in `chipset_dictionary`, accessing
`self.chipset_dictionary[vid][did]` raises a `KeyError` exception. To
prevent this, use the variables `vid_found` and `did_found` before
accessing `self.chipset_dictionary[vid][did]`.

Signed-off-by: Nicolas Iooss <nicolas.iooss_git@polytechnique.org>
2023-05-30 16:38:44 -07:00
Nathaniel Mitchell 0016b0c14c Clean up oshelper
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-05-26 18:32:51 -07:00
brentholtsclaw fd4cc4bb3f Remove get_cpuid() from chipsec_main
is called.  This moves cpuid to a variable within the Chipset
      class.

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
2023-05-23 16:42:45 -07:00
Nathaniel Mitchell 89be1b4ad8 Remove native and add linuxnative as seperate helper
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-05-17 16:36:30 -07:00
Nathaniel Mitchell 99f9052438 Remove filehelper
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-05-09 16:38:36 -07:00
Frinzell, Aaron f8e8bd0ec4 Move to fstrings in chipset.py
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2023-02-07 16:38:41 -08:00
Frinzell, Aaron c4f8aa95c2 Removed deprecated logger functions
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2022-12-05 17:41:00 -06:00
Zhou, Jun2 e417d0196f add cpuid detection string to xml files
add cpuid detection debug mode print, cmdline para "-d" show cpuid detection value as below,

sudo python3.6 chipsec_util.py  -d cpu info

Signed-off-by: Zhou Jun, jun2.zhou@intel.com
2022-12-05 11:27:03 -08:00
Zhou, Jun2 c701e7f131 Use CPUID to identify processors instead of PCI Dev ID -- add cpuid printing
Signed-off-by: Zhou, Jun jun2.zhou@intel.com
2022-10-28 08:15:30 -07:00
brentholtsclaw 52317a2fae Address comments
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
2022-09-29 16:03:48 -07:00