1b6d968000
Update to 1.5.1
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-29 16:21:56 -07:00
7c0fe8241b
Remove extra import
2020-05-29 14:05:18 -07:00
1ead0d25f2
rtclock.py improvements
2020-05-29 14:05:18 -07:00
881e119307
spd.py minor updates
2020-05-29 14:05:03 -07:00
35a614cbfc
Add ICL support
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Add ICL configuration file
Update memconfig, remap, smm_dma modules
Add ia_untrusted module
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-28 14:11:41 -07:00
3bb2b443b7
Don't display pch information for atom
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-26 12:37:35 -07:00
3a981cba61
add SMBIOS_SYSTEM_INFO_2_0
2020-05-20 15:57:51 -07:00
b4134e94d2
don't pass value twice; use value index instead
2020-05-20 15:57:51 -07:00
367f8b746e
fix empty table if only SMBIOS v2 is available
2020-05-20 15:57:51 -07:00
787e556b97
Fixed compilation in kernels >= 5.6 ( #911 )
2020-05-20 15:57:24 -07:00
f3ab247c87
add 0x9B61 to CometLake SKUs
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SKU corresponds to CPU Intel Core i5-10210U
Fix for issue #912
2020-05-14 09:08:06 -07:00
2cea2f4bdc
edit pch assignment logic
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-08 14:31:48 -07:00
d339220226
Fix: Config files within setup.py install
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-08 10:53:40 -07:00
dd4970ef1c
Fixed unknown platform error message to return system information
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2020-05-08 10:53:19 -07:00
33525e2ee0
Make the platform cfg loader to only accept hex based names
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In the cfg folder, filter out the non-hex folder names, currently
we only filter out folders whose name starts with '__'
Signed-off-by: Ignacio Hernandez <ignacio.hernandez@intel.com >
2020-05-08 10:52:47 -07:00
2c6528a38f
Update to verison 1.5.0
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-01 16:46:46 -07:00
731629a7d3
Add PCH_CODE_XXX to globals
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-01 12:17:11 -07:00
daba05d1b0
Fix xml configuration loading
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ensure all filename and configuration names are consistently lowercase
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-01 12:17:11 -07:00
62eac70f7c
Fixed extra closing tag
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2020-05-01 12:16:53 -07:00
c10d066a09
Modify xml load order
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files with common name
files that are not platform/pch specific
files that are platform specific
files that are pch specific
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-01 11:32:09 -07:00
c7da8f0f06
Apollo Lake/Gemini Lake: Fix register definitions
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This commit fixes several register/field definitions for APL and GLK. I found
these mistakes after checking against the Intel datasheets.
In some cases (such as BDSM and friends) I saw that we can just fall back to the
'common' definitions, since those match the datasheets'.
Notice that I intentionally didn't fix ABASE for GLK, so as not to conflict with
PR #890 .
2020-05-01 11:31:29 -07:00
965793d148
Add pch_4xxh to config
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Based on doc 620854 and 620855
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-01 11:19:56 -07:00
57850deb2e
Fixup spibar and pwrmbase for glk and spibar for apl
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-01 11:19:36 -07:00
3df8d27a4c
fix abase definition
2020-05-01 11:17:28 -07:00
54860e3d45
Update IOCTL_LOAD_UCODE_PATCH in linux driver
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-01 08:23:23 -07:00
acace8ec2c
Modify rdmsr/wrmsr for linux driver
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-01 08:22:28 -07:00
45ef668234
Add ability to use LENGTH and ADMSKXXX regs within client atom
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Depends on #844
Fix for issue #877
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-05-01 08:21:45 -07:00
c920c932c2
Sort the reported result summaries
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Makes easier to compare results between runs
Signed-off-by: Ignacio Hernandez <ignacio.hernandez@intel.com >
2020-05-01 08:21:10 -07:00
427ab13196
Adding markdown formatted output
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Signed-off-by: Ignacio Hernandez <ignacio.hernandez@intel.com >
2020-05-01 08:21:10 -07:00
2d0233ad87
Fix broken module imports
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-04-28 16:14:11 -07:00
61c47d8877
Check device enabled based on reg
2020-04-28 16:09:58 -07:00
77835d7fe4
Update hex dump and print
2020-04-28 16:08:27 -07:00
6d491162bf
linux helper HAS_EFI bugfix
2020-04-28 16:07:53 -07:00
bdc5a20611
Move Cfg class to chipset.py
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Delete file
Move class to chipset.py
Remove imports from common.py
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-04-22 16:26:11 -07:00
4f3b7236ba
Remove duplicate configuration from common.py and move specific configuration to hal files
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Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com >
2020-04-22 16:26:11 -07:00
f2f1b54345
Address comments
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Merged in changes from #871 will close PR
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-04-20 08:39:02 -07:00
42310edfb7
Apply suggested changes
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-04-20 08:39:02 -07:00
55a3f7e700
Changes after rebase with 1.4.8
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Fixup 300 split for the configuration
Fixup snb additions
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-04-20 08:39:02 -07:00
514c23d84d
Modify files based upon chipset.py changes
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Fixup files that relied on CHIPSET_ID_XXX logic
Modify files for functions moved within cs class
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com >
2020-04-20 08:39:02 -07:00
d88dc907f3
Modify chipset.py to load configuration dictionary from xml
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Added initialize_xml which reads in pch and chipset dictionary
Added VID to dictinaries
Removed CHIPSET_ID_XXX and functionality
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com >
2020-04-20 08:39:02 -07:00
194c9ec70b
Reorganize xml
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Add VID level directory
Move chipset_dictionary to chipset configurations
Move pch_dictionary to pch configurations
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com >
2020-04-20 08:39:02 -07:00
12bb725351
Update copyright
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-04-17 09:23:07 -07:00
9c47edabf7
Misc LGTM fixes
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-04-17 09:23:07 -07:00
8106f9718a
Helper LGTM fixes
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-04-17 09:13:26 -07:00
4492206438
HAL fixes from LGTM (3/3)
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-04-17 09:13:02 -07:00
87185860e3
Changed the method used for counting the number of threads
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The current method breaks when 'process' is found in the CPU
brand string. Instead use the multiprocessing module to collect
this information.
We could get the information from the MSR but that method does
not work when one or more CPUs are offline.
Signed-off-by: Ignacio Hernandez <ignacio.hernandez@intel.com >
2020-04-16 12:02:18 -07:00
d7646897f7
Fix util command errors
2020-04-16 12:01:58 -07:00
32d0633fcf
HAL fixes from LGTM (2/3)
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-04-16 12:00:36 -07:00
f2b0d31d31
HAL fixes from LGTM (1/3)
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-04-16 12:00:18 -07:00
604c3fc8b9
Update to version 1.4.9
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2020-03-26 17:57:30 -07:00
brentholtsclaw