Commit Graph

747 Commits

Author SHA1 Message Date
Erik Bjorge 40ff7cffbf Get extended BIOS R/W access information
Use the Flash Descriptor Observability registers to OR in the settings
from the flash descriptor to the existing FRAP register fields.

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-11-18 15:13:59 -08:00
nick 6817e43149 remap module not applicable for atom 2019-11-18 15:12:19 -08:00
BrentHoltsclaw 81fd9d6da4 Add GLK support
Document ID: 336561-001

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-11-18 15:11:39 -08:00
BrentHoltsclaw ada230b839 Fix unittest errors
Updated mock_helper to use BaseHelper
Updated util harness to correctly override helper with testhelper

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-11-18 15:10:56 -08:00
BrentHoltsclaw db4186f9f9 Changes after adding duplicate did support
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-11-15 15:54:43 -08:00
BrentHoltsclaw dd82565ea6 Fixup errors with chipset dictionary
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-11-15 15:54:43 -08:00
BrentHoltsclaw ec063c114c Adding 10th Gen support
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-11-15 15:54:43 -08:00
BrentHoltsclaw da36eaaf90 Add duplicate DID support for chipset and pch
changed Chipset_Dictionary and pch_dictionary to default_dict
update logic to create chipset_code and pch_codes
add get_cpuid command to use for additional detection of chipset
updated init logic to match cpuid value if populated within Chipset_Dictionary and multiple entries exist

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-11-13 14:39:30 -08:00
Erik Bjorge 8a64f85db8 Fixed logger flush when redirected to a file
When flushing to a log file the handler is removed but was not added
back.  Added code to restore the handler.

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-11-11 11:21:12 -08:00
Erik Bjorge 3831b1cf05 Fix zero padding when printing registers
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-11-06 20:28:37 -08:00
RageLtMan d02624bbaf valid_mmap_phys_addr_range conflicts with upstream
PaX implements valid_mmap_phys_addr_range in the kernel, and the
(return 1) hack in chipsec_km.c has a name collision with it.

Add another conditional for exposing the definition predicated on
whether __HAVE_ARCH_PAX_OPEN_USERLAND is defined in the kernel
headers. If it is, dont redefine the original function.
2019-11-06 20:26:22 -08:00
Evgeny Zinoviev b77607a0e4 Fix decoding of S3 bootscript EDKCompat opcodes
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
2019-11-06 20:25:49 -08:00
Evgeny Zinoviev 89e5a6a6ef Fix broken s3script_modify
S3 bootscript patching was broken because of incorrect format string
used in __str__ method of class op_io_pci_mem, which was raising KeyError.

Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
2019-11-06 20:25:20 -08:00
Erik Bjorge 5d728ad6ae Add BlackArch Linux reference
Adding BlackArch Linux as a distro that includes CHIPSEC by default

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-11-06 20:24:15 -08:00
Frinzell 6e35771cea Update Windows pywin32 requirements 2019-10-31 14:29:52 -07:00
p-state 17da5461cf More varstore parsing fixes (#728)
* No need to convert to bytes

This led to creation of b'' characters in the file names.

* Correct get_nvar_name (was wrong on python 3)

* Fix NVAR variable store parsing

Fixes wrong guids and python3 compatibility. Working with bytes using python 2/3 compatible `_ord` function.

* Really fix python3 EVSA variable issue

* Fix blank header check (python 3)
2019-10-31 14:24:40 -07:00
BrentHoltsclaw 7f929901bf Add logic to iobar fixed address fallback
Also fallback to fixed address if base address is 0

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-10-31 14:23:55 -07:00
Erik Bjorge 736871e5f9 Adding initial SMBIOS support (#722)
* Initial SMBIOS HAL and Command

- Only searches for the Entry Point structure
- Currently only detects 2.x structures correctly

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>

* Added support for 64bit 3.x entry point

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>

* Updated command processing

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>

* Added ability to parse structures based on header

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>

* Updated command processing

- Made command processing a bit more flexible
- Improved logging messages
- Added place holders for future functionality

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>

* Added ability to get structures by type

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>

* Added string extraction support

- Also added some initial code for decoding type 0 structure information
- Updated interface to make things cleaner

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>

* Added decode support

- Only supports partial decode of Type 0 (2.0) structure

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>

* Removed unused variable

- Also fixed tool name in timing string

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>

* Adding basic BIOS Information module

- Adding module to get the BIOS Information SMBIOS data

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>

* Python 3 updates

- Requires additional Python 3 UEFI HAL changes

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-10-31 14:17:47 -07:00
Erik Bjorge 3354a4e729 Additional Python 3 updates
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-10-24 14:11:50 -07:00
Erik Bjorge c2f13379e7 Fixing Python 3 bug
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-10-24 14:11:06 -07:00
Erik Bjorge af7fdb6d37 Fixing imports and __init__ function
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-10-24 14:11:06 -07:00
Erik Bjorge f20fb71843 Fixed missing () when calling error method
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-10-24 14:08:41 -07:00
BrentHoltsclaw 0e686a9d80 Update chipsec manual and VERSION to 1.4.3
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
1.4.3
2019-10-22 15:05:13 -07:00
Erik Bjorge 694b1b53ca Converted prints to debug logger messages
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-10-21 14:48:54 -07:00
Erik Bjorge dcaa9e1548 Only display when HAL logging enabled
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-10-21 14:48:40 -07:00
Nicholas Armour a0c8a4666e dont convert variable data to string, keep as bytes 2019-10-21 14:48:22 -07:00
Erik Bjorge f924595fd6 Updated UEFI Configuration Table detection.
If the VA in the UEFI System Table is not mapped the UEFI Runtime
Serivices Table PA and VA will be used to compute the UEFI Configuration
Table address using its VA.

This is a final attempt to get a valid address.

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-10-21 14:48:00 -07:00
BrentHoltsclaw 5ea7200d28 Edit acpi_smi hal functions
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-10-21 14:47:30 -07:00
BrentHoltsclaw 75fe4e2dd8 Add python architecture to chipsec_main and chipsec_util banner
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-10-21 14:46:52 -07:00
BrentHoltsclaw dc8bf8d635 Add pch100 dids (#702)
* Add pch100 dids

Document Id 334658-003

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>

* Adding more 100_series_did

Referenced from #520 and pcidb

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-10-21 14:46:23 -07:00
BrentHoltsclaw 408e4f34e1 Change chipset logic to not initiate config for unknown_chipset
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-10-21 14:18:51 -07:00
Erik Bjorge 09dcc5c116 Adding leading 0 padding
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-10-21 14:18:16 -07:00
BrentHoltsclaw 9ca6537936 Change driver unload conditional
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-10-21 14:18:01 -07:00
BrentHoltsclaw 076b9a9b0c Fixup windows output errors within decode
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-10-21 14:17:39 -07:00
BrentHoltsclaw 331c2ae0ad Fix compression includes on WIN
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-10-21 14:17:18 -07:00
Frinzell 7eafa42649 Minor typo in debugenabled 2019-10-21 13:12:05 -07:00
Erik Bjorge d5c4d234c9 Adding CPU Info module
This new module just displays general CPU data.

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-10-21 13:11:00 -07:00
BrentHoltsclaw 02657ef53b Fix conversion of modulo to format
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-10-21 13:10:32 -07:00
Nicholas Armour bc0bf70770 remove dead code 2019-10-21 13:04:35 -07:00
Nicholas Armour 1b386408a9 update ec_cmd to use argparse 2019-10-21 13:04:35 -07:00
nick 4dd08f2a27 python2 compatability fix 2019-10-21 13:02:41 -07:00
BrentHoltsclaw b1da5f4c23 Update to version 1.4.2
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
v1.4.2 1.4.2
2019-09-25 14:27:51 -07:00
Frinzell f13c271631 Duplicate RC register 2019-09-25 10:39:39 -07:00
BrentHoltsclaw ec404f0afc Update compression tools with edk2 Basetools
Modify Compression Libraries, Common, Makefiles, Includes

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-09-24 12:23:26 -07:00
BrentHoltsclaw b38d1e02f0 Fix import error and cleanup imports for tools.secureboot.te
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-09-24 12:23:01 -07:00
BrentHoltsclaw fdac78506d Fix python3 evsa variable issue
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-09-24 12:22:47 -07:00
BrentHoltsclaw b1bfb491a7 Satisfy unittest errors
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-09-24 12:22:28 -07:00
BrentHoltsclaw 870d04816d Fixup lgtm general/util errors
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-09-24 12:22:28 -07:00
BrentHoltsclaw e7f23c76b6 Fixup lgtm module errors
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-09-24 12:22:28 -07:00
BrentHoltsclaw ae9b3f411e Fixup suggested lgtm hal errors
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-09-24 12:22:28 -07:00