Bit 32 of TXT_E2STS is defined as `UINT32 Reset_Policy : 1;` in the SEAM Loader (https://www.intel.de/content/www/de/de/download/738874/intel-trust-domain-extension-intel-tdx-loader.html file `np-seam-loader/seamldr_src/Core/Include/common.h`). There was also a spelling mistake in the description of field `TPM_IF`. Signed-off-by: Nicolas Iooss <nicolas.iooss_git@polytechnique.org>
CHIPSEC: Platform Security Assessment Framework
CHIPSEC is a framework for analyzing the security of PC platforms including hardware, system firmware (BIOS/UEFI), and platform components. It includes a security test suite, tools for accessing various low level interfaces, and forensic capabilities. It can be run on Windows, Linux, Mac OS X and UEFI shell. Instructions for installing and using CHIPSEC can be found in the manual.
NOTE: This software is for security testing purposes. Use at your own risk. Read WARNING.txt before using.
First version of CHIPSEC was released in March 2014: Announcement at CanSecWest 2014
Recent presentation on how to use CHIPSEC to find vulnerabilities in firmware, hypervisors and hardware configuration, explore low level system assets and even detect firmware implants: Exploring Your System Deeper
Release Convention
- CHIPSEC uses a major.minor.patch release version number
- Changes to the arguments or calling conventions will be held for a minor version update
Projects That Include CHIPSEC
Contact Us
For any questions or suggestions please contact us at: chipsec@intel.com
Mailing list:
Twitter:
- For CHIPSEC release alerts: Follow us at CHIPSEC Release
- For general CHIPSEC info: Follow CHIPSEC
For AMD related questions or suggestions please contact Gabriel Kerneis at: Gabriel.Kerneis@ssi.gouv.fr