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mirror of https://github.com/chipsec/chipsec synced 2026-06-08 13:31:00 +00:00
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48bd9f2afd8a4030f0a1f07abecf1000ea0b1acf
chipsec-chipsec/source/tool/chipsec
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frinzell 48bd9f2afd Added VTGENCTRL register definition (#91)
2016-09-26 14:01:01 -07:00
..
cfg
Added VTGENCTRL register definition (#91)
2016-09-26 14:01:01 -07:00
hal
Catch exception when enumerating PCI devices (#87)
2016-09-10 00:10:17 -07:00
helper
Fix issue #19
2016-09-15 00:45:45 -07:00
modules
Add detection of EFI binaries vulnerable to ThinkPwn to blacklist config (#89)
2016-09-21 09:35:17 -07:00
utilcmd
Make line endings consistent. Issue #13 fix (#85)
2016-09-07 15:23:33 -07:00
__init__.py
Make line endings consistent. Issue #13 fix (#85)
2016-09-07 15:23:33 -07:00
chipset.py
Kabylake platform support (#88)
2016-09-15 00:21:31 -07:00
command.py
Add BaseCommand class
2016-05-23 09:35:44 +10:00
defines.py
Support of native API mode (#59)
2016-09-01 17:30:27 -07:00
file.py
Make line endings consistent. Issue #13 fix (#85)
2016-09-07 15:23:33 -07:00
logger.py
Make line endings consistent. Issue #13 fix (#85)
2016-09-07 15:23:33 -07:00
module_common.py
Make line endings consistent. Issue #13 fix (#85)
2016-09-07 15:23:33 -07:00
module.py
Make line endings consistent. Issue #13 fix (#85)
2016-09-07 15:23:33 -07:00
VERSION
Version 1.2.4
2016-08-13 00:14:34 -07:00
xmlout.py
Make line endings consistent. Issue #13 fix (#85)
2016-09-07 15:23:33 -07:00
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