Nicolas Iooss
c2bcf585ec
Reading 64-bit MMIO registers does not work with Linux native helper.
For example:
$ ./chipsec_util.py --helper linuxnativehelper txt state
...
TXT Public Key Hash: 9c78f0d8000000002f47761c00000000164a66a90000000092e3144f00000000
This value comes from four 64-bit MMIO registers (`TXT_PUBLIC_KEY_0` to
`TXT_PUBLIC_KEY_3`). This is caused by `LinuxNativeHelper.read_mmio_reg`
assuming the size cannot be larger than 4. And it also assumes that the
physical address is always aligned on a 4-byte boundary.
Reading a value as a "32-bit integer" can be important for MMIO
registers, so do not change this case, when the physical address is
aligned. In practice:
- If `size == 1`, the result can be directly read from the mapping.
- Otherwise, if the address is aligned,
`region_mv.cast(defines.SIZE2FORMAT[size])` can be used to trigger an
atomic read of the requested size.
- In the unaligned case, the bytes are read from the memory view,
possibly one by one, and `defines.unpack1` is used to glue them back
to an integer.
Implement a similar logic in `write_mmio_reg` too. While at it, as the
`return 0` did not make much sense in this function, remove it.
With this commit:
$ ./chipsec_util.py --helper linuxnativehelper txt state
...
TXT Public Key Hash: 9c78f0d853de854a2f47761c72b86a11164a66a984c1aad792e3144fb71c2d11
Signed-off-by: Nicolas Iooss <nicolas.iooss_git@polytechnique.org>
CHIPSEC: Platform Security Assessment Framework
CHIPSEC is a framework for analyzing the security of PC platforms including hardware, system firmware (BIOS/UEFI), and platform components. It includes a security test suite, tools for accessing various low level interfaces, and forensic capabilities. It can be run on Windows, Linux, Mac OS X and UEFI shell. Instructions for installing and using CHIPSEC can be found in the manual.
NOTE: This software is for security testing purposes. Use at your own risk. Read WARNING.txt before using.
First version of CHIPSEC was released in March 2014: Announcement at CanSecWest 2014
Recent presentation on how to use CHIPSEC to find vulnerabilities in firmware, hypervisors and hardware configuration, explore low level system assets and even detect firmware implants: Exploring Your System Deeper
Release Convention
- CHIPSEC uses a major.minor.patch release version number
- Changes to the arguments or calling conventions will be held for a minor version update
Projects That Include CHIPSEC
Contact Us
For any questions or suggestions please contact us at: chipsec@intel.com
Mailing list:
Twitter:
- For CHIPSEC release alerts: Follow us at CHIPSEC Release
- For general CHIPSEC info: Follow CHIPSEC
For AMD related questions or suggestions please contact Gabriel Kerneis at: Gabriel.Kerneis@ssi.gouv.fr