Several registers from an old version of TXT were documented in an "Intel® Trusted Execution Technology (Intel®TXT) LAB Handout" from 2010: https://docplayer.net/42821782-Intel-trusted-execution-technology-intel-txt-lab-handout.html This includes MSEG definition, which was also documented in tboot: https://github.com/tklengyel/tboot/blob/c9ca81f41b4a3eaa8e00c12a3d1d6d3c783782d4/tboot/include/txt/config_regs.h #define TXTCR_MSEG_BASE 0x0310 #define TXTCR_MSEG_SIZE 0x0318 Moreover, add registers from Intel TXT Software Development Guide 315168-017 (updated in January 2021) from http://www.intel.com/content/dam/www/public/us/en/documents/guides/intel-txt-software-development-guide.pdf Add TXT_ACM_STATUS from 9elements/converged-security-suite repository https://github.com/9elements/converged-security-suite/commit/b5037f9c93701d52fe4f3beb4b44a65854479609 and slimbootloader project https://github.com/slimbootloader/slimbootloader/blob/35813687fb2a69a70727f82b7ed125fc2b22d35b/Platform/CometlakevBoardPkg/Library/Stage1BBoardInitLib/Stage1BBoardInitLib.c and coreboot project https://github.com/coreboot/coreboot/blob/28894c57988076688395c8a122d79640a3702d1a/src/security/intel/cbnt/cbnt.h
CHIPSEC: Platform Security Assessment Framework
CHIPSEC is a framework for analyzing the security of PC platforms including hardware, system firmware (BIOS/UEFI), and platform components. It includes a security test suite, tools for accessing various low level interfaces, and forensic capabilities. It can be run on Windows, Linux, Mac OS X and UEFI shell. Instructions for installing and using CHIPSEC can be found in the manual.
NOTE: This software is for security testing purposes. Use at your own risk. Read WARNING.txt before using.
First version of CHIPSEC was released in March 2014: Announcement at CanSecWest 2014
Recent presentation on how to use CHIPSEC to find vulnerabilities in firmware, hypervisors and hardware configuration, explore low level system assets and even detect firmware implants: Exploring Your System Deeper
Release Convention
- CHIPSEC uses a major.minor.patch release version number
- Changes to the arguments or calling conventions will be held for a minor version update
Projects That Include CHIPSEC
Contact Us
For any questions or suggestions please contact us at: chipsec@intel.com
Mailing list:
Twitter:
- For CHIPSEC release alerts: Follow us at CHIPSEC Release
- For general CHIPSEC info: Follow CHIPSEC
For AMD related questions or suggestions please contact Gabriel Kerneis at: Gabriel.Kerneis@ssi.gouv.fr