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https://github.com/hakril/PythonForWindows
synced 2026-06-08 14:31:45 +00:00
Add call [mem] and xchg REG,[RE]AX
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@@ -574,6 +574,11 @@ class Pop(Instruction):
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class Call(Instruction):
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encoding = [(RawBits.from_int(8, 0xff), Slash(2))]
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class Xchg(Instruction):
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default_32_bits = True
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encoding = [(RawBits.from_int(5, 0x90 >> 3), RegisterRax(), X64RegisterSelector()),
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(RawBits.from_int(5, 0x90 >> 3), X64RegisterSelector(), RegisterRax())]
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class Ret(Instruction):
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encoding = [(RawBits.from_int(8, 0xc3),)]
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@@ -381,7 +381,7 @@ class Slash(object):
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raise ValueError("Missing arg for Slash")
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# Reuse all the MODRm logique with the reg as our self.reg
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# The sens of param is strange I need to fix the `reversed` logique
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arg_consum, value = ModRM([ModRM_REG__REG, ModRM_REG__MEM]).accept_arg(previous, args[:1] + [self.reg] + args[1:])
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arg_consum, value = ModRM([ModRM_REG__REG, ModRM_REG__MEM], has_direction_bit=False).accept_arg(previous, args[:1] + [self.reg] + args[1:])
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if value is None:
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return arg_consum, value
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return arg_consum-1, value
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@@ -451,9 +451,6 @@ class Mov(Instruction):
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class Lea(Instruction):
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encoding = [(RawBits.from_int(8, 0x8d), ModRM([ModRM_REG__MEM], accept_reverse=False, has_direction_bit=False))]
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class Call(Instruction):
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encoding = [(RawBits.from_int(13, 0xffd0 >> 3), X86RegisterSelector())]
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class Cmp(Instruction):
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encoding = [(RawBits.from_int(8, 0x3d), RegisterEax(), Imm32()),
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(RawBits.from_int(8, 0x81), Slash(7), Imm32()),
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@@ -508,6 +505,12 @@ class Jnz(JmpType):
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class Xor(Instruction):
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encoding = [(RawBits.from_int(8, 0x31), ModRM([ModRM_REG__REG]))]
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class Xchg(Instruction):
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encoding = [(RawBits.from_int(5, 0x90 >> 3), RegisterEax(), X86RegisterSelector()), (RawBits.from_int(5, 0x90 >> 3), X86RegisterSelector(), RegisterEax())]
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class Call(Instruction):
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encoding = [(RawBits.from_int(8, 0xff), Slash(2))]
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class Ret(Instruction):
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encoding = [(RawBits.from_int(8, 0xc3),)]
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@@ -95,4 +95,7 @@ TestInstr(Push)('R15')
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TestInstr(Push)(0x42)
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TestInstr(Push)(-1)
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TestInstr(Call)('RAX')
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TestInstr(Call)(mem('[RAX + RCX * 8]'))
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TestInstr(Call)(mem('[RAX + RCX * 8]'))
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TestInstr(Xchg)('RAX', 'RSP')
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assert Xchg('RAX', 'RCX').get_code() == Xchg('RCX', 'RAX').get_code()
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@@ -80,3 +80,8 @@ TestInstr(Add)('EAX', 0xffffffff)
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TestInstr(Lea)('EAX', mem('[EAX + 1]'))
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TestInstr(Lea)('ECX', mem('[EDI + -0xff]'))
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TestInstr(Call)('EAX')
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TestInstr(Call)(mem('[EAX + ECX * 8]'))
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TestInstr(Xchg)('EAX', 'ESP')
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assert Xchg('EAX', 'ECX').get_code() == Xchg('ECX', 'EAX').get_code()
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