mirror of
https://github.com/icicle-emu/icicle-python
synced 2026-06-21 13:53:41 +00:00
Merge pull request #23 from icicle-emu/push-rewind
Delay updating RSP until after the memory write when executing 'push'
This commit is contained in:
@@ -1145,78 +1145,78 @@ macro ptr8(r,x) {
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macro push22(x) {
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mysave:2 = x;
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SP = SP -2;
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tmp:$(SIZE) = segment(SS,SP);
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tmp:$(SIZE) = segment(SS,SP-2);
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*:2 tmp = mysave;
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SP = SP-2;
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}
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macro push24(x) {
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mysave:4 = x;
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SP = SP-4;
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tmp:$(SIZE) = segment(SS,SP);
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tmp:$(SIZE) = segment(SS,SP-4);
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*:4 tmp = mysave;
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SP = SP-4;
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}
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macro push28(x) {
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mysave:8 = x;
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SP = SP-8;
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tmp:$(SIZE) = segment(SS,SP);
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tmp:$(SIZE) = segment(SS,SP-8);
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*:8 tmp = mysave;
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SP = SP-8;
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}
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macro push42(x) {
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mysave:2 = x;
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$(STACKPTR) = $(STACKPTR) - 2;
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*:2 $(STACKPTR) = mysave;
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*:2 ($(STACKPTR)-2) = mysave;
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$(STACKPTR) = $(STACKPTR)-2;
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}
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macro push44(x) {
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mysave:4 = x;
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$(STACKPTR) = $(STACKPTR) - 4;
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*:4 $(STACKPTR) = mysave;
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*:4 ($(STACKPTR)-4) = mysave;
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$(STACKPTR) = $(STACKPTR)-4;
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}
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macro pushseg44(x) {
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mysave:2 = x;
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$(STACKPTR) = $(STACKPTR) - 4;
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*:2 $(STACKPTR) = mysave;
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*:2 ($(STACKPTR)-4) = mysave;
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$(STACKPTR) = $(STACKPTR)-4;
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}
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macro push48(x) {
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mysave:8 = x;
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$(STACKPTR) = $(STACKPTR) - 8;
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*:8 $(STACKPTR) = mysave;
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*:8 ($(STACKPTR)-8) = mysave;
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$(STACKPTR) = $(STACKPTR)-8;
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}
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@ifdef IA64
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macro push82(x) {
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mysave:2 = x;
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$(STACKPTR) = $(STACKPTR) - 2;
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*:2 $(STACKPTR) = mysave;
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*:2 ($(STACKPTR)-2) = mysave;
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$(STACKPTR) = $(STACKPTR)-2;
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}
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macro push84(x) {
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mysave:4 = x;
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$(STACKPTR) = $(STACKPTR) - 4;
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*:4 $(STACKPTR) = mysave;
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*:4 ($(STACKPTR)-4) = mysave;
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$(STACKPTR) = $(STACKPTR)-4;
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}
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macro push88(x) {
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mysave:8 = x;
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$(STACKPTR) = $(STACKPTR) - 8;
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*:8 $(STACKPTR) = mysave;
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*:8 ($(STACKPTR)-8) = mysave;
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$(STACKPTR) = $(STACKPTR)-8;
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}
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macro pushseg82(x) {
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mysave:2 = x;
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$(STACKPTR) = $(STACKPTR) - 2;
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*:2 $(STACKPTR) = mysave;
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*:2 ($(STACKPTR)-2) = mysave;
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$(STACKPTR) = $(STACKPTR)-2;
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}
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macro pushseg88(x) {
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mysave:2 = x;
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$(STACKPTR) = $(STACKPTR) - 8;
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*:2 $(STACKPTR) = mysave;
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*:2 ($(STACKPTR)-8) = mysave;
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$(STACKPTR) = $(STACKPTR)-8;
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}
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@endif
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+80
-10
@@ -1,3 +1,5 @@
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#![allow(unused)]
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use icicle::*;
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use pyo3::PyResult;
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use std::process::exit;
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@@ -22,6 +24,20 @@ fn new_vm(jit: bool) -> PyResult<Icicle> {
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)
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}
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fn new_trace_vm(jit: bool) -> PyResult<Icicle> {
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Icicle::new(
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"x86_64".to_string(),
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jit,
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true,
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false,
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true,
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false,
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true,
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false,
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true,
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)
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}
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fn nx_start() -> PyResult<()> {
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let mut vm = new_vm(false)?;
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let page = 0x10000;
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@@ -102,7 +118,7 @@ fn block_optimization() -> PyResult<()> {
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vm.mem_map(heap, 0x1000, MemoryProtection::ReadWrite)?;
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vm.mem_write(heap + 4, b"\x37\x13\x00\x00".to_vec())?;
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vm.mem_map(addr & !0xFFF, 0x1000, MemoryProtection::ExecuteRead)?;
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vm.mem_write(addr, b"\x41\xc1\xea\x07\x41\x83\xe2\x1f\x74\x08\x44\x89\xd0\x48\x89\x54\xc6\x08\x49\x83\xc1\x04\x4c\x89\x0e\x4c\x89\xc9\x44\x8b\x11\x44\x89\xd0\xf7\xd0\x49\x89\xc9\xa8\x03\x0f\x84\x88\xf6\xff\xff\xeb\x4c".to_vec())?;
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vm.mem_write(addr, b"\x41\xc1\xea\x07\x41\x83\xe2\x1f\x74\x08\x44\x89\xd0\x48\x89\x54\xc6\x08\x49\x83\xc1\x04\x4c\x89\x0e\x4c\x89\xc9\x44\x8b\x11\x44\x89\xd0\xf7\xd0\x49\x89\xc9\xa8\x03\x0f\x84\x88\xf6\xff\xff\xeb\x4c\xcc".to_vec())?;
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// Register setup
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vm.reg_write("r9", heap)?;
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@@ -142,7 +158,7 @@ fn rewind() -> PyResult<()> {
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vm.mem_map(0x100, 0x20, MemoryProtection::ExecuteRead)?;
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vm.mem_map(0x200, 0x20, MemoryProtection::ReadOnly)?;
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vm.mem_write(0x100, b"\x55".to_vec())?; // push rbp
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vm.mem_write(0x100, b"\x55\xCC".to_vec())?; // push rbp
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vm.reg_write("rbp", 0xF00)?;
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vm.reg_write("rsp", 0x210)?;
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vm.reg_write("rip", 0x100)?;
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@@ -155,16 +171,60 @@ fn rewind() -> PyResult<()> {
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Ok(())
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}
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fn execute_only() -> PyResult<()> {
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let mut vm = new_vm(true)?;
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fn execute_uninitialized() -> PyResult<()> {
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let mut vm = Icicle::new(
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"x86_64".to_string(),
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false,
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true,
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false,
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true,
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true, // NOTE: setting this to true is not properly supported
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true,
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false,
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true,
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)?;
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// \x48\x8d\x05\x01\x00\x00\x00\x90\x8a\x18\x90
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vm.mem_map(0x100, 0x20, MemoryProtection::ExecuteOnly)?;
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vm.mem_write(0x100, b"\x90".to_vec())?; // nop
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vm.mem_write(0x100, b"\xFF\xC0".to_vec())?; // inc eax
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vm.reg_write("rip", 0x100)?;
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let status = vm.step(1);
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// NOTE: the real reason is that INIT is not set
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println!("run status : {:?}", status);
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println!("exception code : {:?}", vm.get_exception_code());
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println!("exception value : {:#x}", vm.get_exception_value());
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println!("rax : {:#x}", vm.reg_read("rax")?);
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// TODO: status is now UnhandledException, should be InstructionLimit
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// on the next stpe it should be UnhandledException -> ExecViolation
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Ok(())
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}
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fn execute_only() -> PyResult<()> {
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let mut vm = new_vm(false)?;
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vm.mem_map(0x100, 0x20, MemoryProtection::ExecuteOnly)?;
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/*
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0x100: lea rax, [rip]
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0x107: nop
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0x108: mov bl, byte ptr [rax]
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0x10A: int3
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*/
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vm.mem_write(
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0x100,
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b"\x48\x8d\x05\x00\x00\x00\x00\x90\x8a\x18\xCC".to_vec(),
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)?; // nop
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vm.reg_write("rip", 0x100)?;
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vm.step(2);
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let status = vm.step(1);
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// NOTE: the real reason is that INIT is not set
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println!("run status : {:?}", status);
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println!("exception code : {:?}", vm.get_exception_code());
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println!("exception value : {:#x}", vm.get_exception_value());
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println!("bl: {:#x}", vm.reg_read("bl")?);
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println!("rip: {:#x}", vm.reg_read("rip")?);
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Ok(())
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}
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@@ -178,7 +238,10 @@ fn step_modify_rip() -> PyResult<()> {
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// 0x107: 48 89 d9 mov rcx,rbx
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// 0x10a: 90 nop
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// 0x10b: 90 nop
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vm.mem_write(0x100, b"\x48\x01\xD8\x48\x83\xE9\x05\x48\x89\xD9\x90\x90".to_vec())?;
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vm.mem_write(
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0x100,
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b"\x48\x01\xD8\x48\x83\xE9\x05\x48\x89\xD9\x90\x90\xCC".to_vec(),
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)?;
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vm.reg_write("rax", 0xF00)?;
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vm.reg_write("rbx", 0x210)?;
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@@ -194,7 +257,7 @@ fn step_modify_rip() -> PyResult<()> {
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);
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vm.reg_write("rip", 0x100)?;
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//vm.write_pc(0x100);
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//println!("pc: {:#x}", vm.read_pc());
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//println!("pc: {:#x}", vm.read_pc());
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println!("rip rewritten {:#x}", vm.reg_read("rip")?);
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status = vm.step(1);
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println!(
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@@ -210,7 +273,7 @@ fn eflags_reconstruction() -> PyResult<()> {
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let mut vm = new_vm(false)?;
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vm.mem_map(0x100, 0x20, MemoryProtection::ExecuteRead)?;
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vm.mem_write(0x100, b"\x48\x01\xD8".to_vec())?;
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vm.mem_write(0x100, b"\x48\x01\xD8\xCC".to_vec())?;
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vm.reg_write("rax", 0x7FFFFFFFFFFFFFFF)?;
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vm.reg_write("rbx", 0x1)?;
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@@ -232,7 +295,10 @@ fn eflags_reconstruction() -> PyResult<()> {
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let rflags = vm.reg_read("rflags")?;
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let of = vm.reg_read("OF")?;
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let of_set = (eflags & of_mask) == of_mask;
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println!("[post] eflags: {:#x} == {:#x}, OF: {:#x} == {}", eflags, rflags, of, of_set);
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println!(
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"[post] eflags: {:#x} == {:#x}, OF: {:#x} == {}",
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eflags, rflags, of, of_set
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);
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}
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{
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@@ -249,7 +315,10 @@ fn eflags_reconstruction() -> PyResult<()> {
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vm.reg_write("rflags", eflags)?;
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let of = vm.reg_read("OF")?;
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let of_set = (eflags >> 11) & 1;
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println!("[rflags|={:#x}] eflags: {:#x}, OF: {:#x} == {}", of_mask, eflags, of, of_set);
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println!(
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"[rflags|={:#x}] eflags: {:#x}, OF: {:#x} == {}",
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of_mask, eflags, of, of_set
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);
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}
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Ok(())
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@@ -284,6 +353,7 @@ fn main() {
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("Block optimization bug", block_optimization),
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("Rewind", rewind),
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("Execute only", execute_only),
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("Execute uninitialized", execute_uninitialized),
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("Step modify rip", step_modify_rip),
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("EFlags reconstruction", eflags_reconstruction),
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];
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