mirror of
https://github.com/intel/linux-sgx
synced 2026-06-08 14:49:32 +00:00
e7bbc158fa
Supported the AEX (Asynchronous Enclave Exit) Notify feature. Supported Mbed-TLS Cryptography library (excluding SSL/TLS portion) in Enclave. Applied patches to OpenSSL 1.1.1t, fixed CVE-2023-1255, CVE-2023-0465 and CVE-2023-0466. Upgraded to Intel(R) Integrated Performance Primitives (IPP) Cryptography library version 2021.7. Upgraded Intel SGX Quote Verification Enclave to integrate updated SgxSSL. Enhanced the attestation local cache functionality by giving users the option to provide their own cache file. Enabled QPL/QCNL log in DCAP samples. Fixed bugs. Signed-off-by: Li, Xun <xun.li@intel.com>
243 lines
7.1 KiB
C++
243 lines
7.1 KiB
C++
/*
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* Copyright (C) 2011-2021 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include "trts_util.h"
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#include "global_data.h"
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#include "util.h"
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#include "thread_data.h"
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#include "trts_internal.h"
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#include "sgx_attributes.h"
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#include "xsave.h"
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// No need to check the state of enclave or thread.
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// The functions should be called within an ECALL, so the enclave and thread must be initialized at that time.
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size_t get_enclave_size(void)
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{
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return (size_t) g_global_data.enclave_size;
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}
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size_t get_enclave_end(void)
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{
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return (size_t)get_enclave_base() + (size_t)g_global_data.enclave_size - 1;
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}
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void * get_heap_base(void)
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{
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return GET_PTR(void, get_enclave_base(), g_global_data.heap_offset);
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}
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size_t get_heap_size(void)
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{
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size_t heap_size = g_global_data.heap_size;
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if (EDMM_supported)
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{
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for(uint32_t i = 0; i < g_global_data.layout_entry_num; i++)
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{
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if(g_global_data.layout_table[i].entry.id == LAYOUT_ID_HEAP_MAX)
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{
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heap_size += ((size_t)g_global_data.layout_table[i].entry.page_count << SE_PAGE_SHIFT);
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}
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}
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}
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return heap_size;
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}
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size_t get_heap_min_size(void)
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{
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size_t heap_size = 0;
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for(uint32_t i = 0; i < g_global_data.layout_entry_num; i++)
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{
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if(g_global_data.layout_table[i].entry.id == LAYOUT_ID_HEAP_MIN)
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{
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heap_size = ((size_t)g_global_data.layout_table[i].entry.page_count << SE_PAGE_SHIFT);
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break;
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}
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}
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return heap_size;
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}
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void * get_rsrv_base(void)
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{
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return GET_PTR(void, get_enclave_base(), g_global_data.rsrv_offset);
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}
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size_t get_rsrv_end(void)
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{
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return (size_t)get_rsrv_base() + (size_t)get_rsrv_size() - 1;
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}
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size_t get_rsrv_size(void)
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{
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size_t rsrv_size = g_global_data.rsrv_size;
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if (EDMM_supported)
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{
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for (uint32_t i = 0; i < g_global_data.layout_entry_num; i++)
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{
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if (g_global_data.layout_table[i].entry.id == LAYOUT_ID_RSRV_MAX)
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{
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rsrv_size += ((size_t)g_global_data.layout_table[i].entry.page_count << SE_PAGE_SHIFT);
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}
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}
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}
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return rsrv_size;
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}
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size_t get_rsrv_min_size(void)
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{
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size_t rsrv_size = 0;
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for (uint32_t i = 0; i < g_global_data.layout_entry_num; i++)
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{
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if (g_global_data.layout_table[i].entry.id == LAYOUT_ID_RSRV_MIN)
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{
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rsrv_size = ((size_t)g_global_data.layout_table[i].entry.page_count << SE_PAGE_SHIFT);
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break;
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}
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}
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return rsrv_size;
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}
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int * get_errno_addr(void)
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{
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thread_data_t *thread_data = get_thread_data();
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return reinterpret_cast<int *>(&thread_data->last_error);
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}
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//tRTS will receive a pointer to an array of uint64_t which indicates the
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//features of the running system. This function can be used to query whether
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//a certain feature (such as EDMM) is supported.
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//It takes as input the pointer to the array and the feature bit location.
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//The feature array coming from uRTS should be dealt with in the following way:
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//Every bit except the MSb in each uint64 represents a certain feature.
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//The MSb of each uint64_t, if set, indicates this is the last uint64_t to
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//search for the feature's existance.
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//For example, if we have two uint64_t elements in the array:
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//array[0]: xxxxxxxxxxxxxxxx array[1] Xxxxxxxxxxxxxxxx
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//MSb of array[1] should already be set to one by uRTS. Shown by capital 'X' here.
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//Features listed in array[0], counting from right-most bit to left-most bit,
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//have feature shift values 0 ~ 62, while features listed in array[1], have feature
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//shift values 64 ~ 126.
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int feature_supported(const uint64_t *feature_set, uint32_t feature_shift)
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{
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const uint64_t *f_set = feature_set;
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uint32_t bit_position = 0, i = 0;
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if (!f_set)
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return 0;
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while (((i+1) << 6) <= feature_shift)
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{
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if (f_set[i] & (0x1ULL << 63))
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return 0;
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i++;
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}
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bit_position = feature_shift - (i << 6);
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if (f_set[i] & (0x1ULL << bit_position))
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return 1;
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else
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return 0;
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}
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bool is_stack_addr(void *address, size_t size)
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{
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thread_data_t *thread_data = get_thread_data();
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size_t stack_base = thread_data->stack_base_addr;
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size_t stack_limit = thread_data->stack_limit_addr;
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size_t addr = (size_t) address;
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return (addr <= (addr + size)) && (stack_base >= (addr + size)) && (stack_limit <= addr);
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}
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bool is_valid_sp(uintptr_t sp)
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{
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return ( !(sp & (sizeof(uintptr_t) - 1)) // sp is expected to be 4/8 bytes aligned
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&& is_stack_addr((void*)sp, 0) ); // sp points to the top/bottom of stack are accepted
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}
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bool is_utility_thread()
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{
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thread_data_t *thread_data = get_thread_data();
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if ((thread_data != NULL) && (thread_data->flags & SGX_UTILITY_THREAD))
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{
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return true;
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}
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return false;
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}
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size_t get_max_tcs_num()
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{
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if (EDMM_supported == 1)
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{
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return (size_t)g_global_data.tcs_max_num;
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}
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else
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{
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return (size_t)g_global_data.tcs_num;
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}
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}
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bool is_pkru_enabled()
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{
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uint64_t xfrm = get_xfeature_state();
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if((xfrm & SGX_XFRM_PKRU) == SGX_XFRM_PKRU)
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return true;
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return false;
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}
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bool is_tcs_binding_mode()
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{
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return g_global_data.thread_policy == TCS_POLICY_BIND ? true : false;
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}
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size_t get_xsave_size()
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{
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return (size_t)g_global_data.td_template.xsave_size;
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}
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int get_ssa_aexnotify()
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{
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int flag = 0;
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thread_data_t *thread_data = get_thread_data();
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ssa_gpr_t *ssa_gpr = NULL;
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if(thread_data == NULL)
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{
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return 0;
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}
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ssa_gpr = reinterpret_cast<ssa_gpr_t *>(thread_data->first_ssa_gpr);
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flag = ssa_gpr->aex_notify & SSA_AEXNOTIFY_MASK;
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return flag;
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}
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