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ARM64, fix issue for PC-relative offset (#291)

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b.cond/cbz/cbnz/tbz/tbnz/adrp
This commit is contained in:
noword
2017-04-08 14:17:03 +08:00
committed by Nguyen Anh Quynh
parent 2e6f7c3984
commit 51ea7aff4e
2 changed files with 4 additions and 4 deletions
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llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+1 -1
View File
@@ -1133,7 +1133,7 @@ public:
return false;
if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Imm.Val)) {
int64_t Val = CE->getValue();
int64_t Val = CE->getValue() - Ctx.getBaseAddress();
int64_t Min = - (4096 * (1LL << (21 - 1)));
int64_t Max = 4096 * ((1LL << (21 - 1)) - 1);
return (Val % 4096) == 0 && Val >= Min && Val <= Max;
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
+3 -3
View File
@@ -219,7 +219,7 @@ AArch64MCCodeEmitter::getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx,
// If the destination is an immediate, we have nothing to do.
if (MO.isImm())
return MO.getImm();
return (MO.getImm() * 4096 - MI.getAddress()) / 4096;
assert(MO.isExpr() && "Unexpected target type!");
const MCExpr *Expr = MO.getExpr();
@@ -268,7 +268,7 @@ uint32_t AArch64MCCodeEmitter::getCondBranchTargetOpValue(
// If the destination is an immediate, we have nothing to do.
if (MO.isImm())
return MO.getImm();
return (MO.getImm() * 4 - MI.getAddress()) / 4;
assert(MO.isExpr() && "Unexpected target type!");
MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch19);
@@ -332,7 +332,7 @@ uint32_t AArch64MCCodeEmitter::getTestBranchTargetOpValue(
// If the destination is an immediate, we have nothing to do.
if (MO.isImm())
return MO.getImm();
return (MO.getImm() * 4 - MI.getAddress()) / 4;
assert(MO.isExpr() && "Unexpected ADR target type!");
MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch14);