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Add MOVMSKPS instruction semantics (#751)

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This commit is contained in:
Maurice Heumann
2026-02-10 05:30:40 +01:00
committed by GitHub
parent 9908142dc7
commit 20f6e1c544
3 changed files with 67 additions and 0 deletions
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lib/Arch/X86/Semantics/DATAXFER.cpp
+18
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@@ -78,6 +78,22 @@ DEF_SEM(MOVxPD, D dst, S src) {
return memory;
}
// MOVMSKPS: extract sign bits (bit 31) of 4 single-precision floats into GPR32
template <typename D, typename S>
DEF_SEM(MOVMSKPS, D dst, S src) {
auto src_vec = UReadV32(src);
auto s0 = UExtractV32(src_vec, 0);
auto s1 = UExtractV32(src_vec, 1);
auto s2 = UExtractV32(src_vec, 2);
auto s3 = UExtractV32(src_vec, 3);
auto r32 = UOr(
UOr(UOr(UShr(s0, 31_u32), UShl(UShr(s1, 31_u32), 1_u32)),
UShl(UShr(s2, 31_u32), 2_u32)),
UShl(UShr(s3, 31_u32), 3_u32));
WriteZExt(dst, r32);
return memory;
}
template <typename D, typename S>
DEF_SEM(MOVDQx, D dst, S src) {
UWriteV128(dst, UReadV128(src));
@@ -486,6 +502,8 @@ DEF_ISEL(MOVLHPS_XMMq_XMMq) = MOVLHPS;
IF_AVX(DEF_ISEL(VMOVLHPS_XMMdq_XMMq_XMMq) = VMOVLHPS;)
IF_AVX(DEF_ISEL(VMOVLHPS_XMMdq_XMMdq_XMMdq) = VMOVLHPS;)
DEF_ISEL(MOVMSKPS_GPR32_XMMps) = MOVMSKPS<R32W, V128>;
#if HAS_FEATURE_AVX
# if HAS_FEATURE_AVX512
tests/X86/DATAXFER/MOVMSKPS.S
+48
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@@ -0,0 +1,48 @@
/*
* Copyright (c) 2017 Trail of Bits, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* MOVMSKPS r32, xmm: extract sign bits (bit 31) of 4 single-precision
* floats into the low 4 bits of r32. Each TEST_INPUTS pair is (low 64 bits,
* high 64 bits) of the XMM register, i.e. [float0, float1] and [float2, float3]. */
TEST_BEGIN_64(MOVMSKPSr32xmm_0, 2)
TEST_INPUTS(
0, 0,
0x8000000000000000, 0,
0x8000000080000000, 0,
0x8000000000000000, 0x8000000000000000,
0x8000000080000000, 0x8000000080000000)
sub rsp, 16
mov [rsp], ARG1_64
mov [rsp+8], ARG2_64
movaps xmm0, [rsp]
movmskps eax, xmm0
add rsp, 16
TEST_END_64
TEST_BEGIN_64(MOVMSKPSr32xmm_4, 2)
TEST_INPUTS(
0, 0,
0x8000000080000000, 0x8000000080000000)
sub rsp, 16
mov [rsp], ARG1_64
mov [rsp+8], ARG2_64
movaps xmm4, [rsp]
movmskps eax, xmm4
add rsp, 16
TEST_END_64
tests/X86/Tests.S
+1
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@@ -348,6 +348,7 @@ SYMBOL(__x86_test_table_begin):
#include "tests/X86/DATAXFER/MOVLPD.S"
#include "tests/X86/DATAXFER/MOVLPS.S"
#include "tests/X86/DATAXFER/MOVLHPS.S"
#include "tests/X86/DATAXFER/MOVMSKPS.S"
#include "tests/X86/DATAXFER/MOVQ.S"
#include "tests/X86/DATAXFER/MOVSD.S"
#include "tests/X86/DATAXFER/MOVSS.S"