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https://github.com/lifting-bits/remill
synced 2026-06-21 13:56:07 +00:00
CHange allow 32 bit shift to true, not sure if valid but oh well
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@@ -1824,7 +1824,9 @@ static bool TryDecodeLoadStoreWordUBReg(Instruction &inst, uint32_t bits) {
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static_cast<int32_t>(inst.pc & ~(3u)) - static_cast<int32_t>(inst.pc);
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}
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AddShiftRegImmOperand(inst, enc.rm, enc.type, enc.imm5, 0u, false);
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// TODO(pag): Changed `can_shift_right_by_32` to `true` but don't know why
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// it was previously `false`.
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AddShiftRegImmOperand(inst, enc.rm, enc.type, enc.imm5, 0u, true);
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auto disp_expr = inst.operands.back().expr;
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auto disp_op = llvm::Instruction::Add;
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