mirror of
https://github.com/lifting-bits/remill
synced 2026-06-21 13:56:07 +00:00
Peter Goodman
026ea1afec
* Added semantics and tests for SDIV * Semantics and tests for SCVTF. * Working on integer to/from float conversion bugs related to managing the fpu status register. * Switch to using the check float function wrapper * Remove unintentional call to fetestexcept * Adding in a compiler reordering barrier. * Added inline assembly that will force clang's optimizer to give up and filed a clang bug * Adds some trailing spaces into some files. Re-enables all aarch64 tests. * Added semantics and tests for SDIV * Semantics and tests for SCVTF. * Switch to using the check float function wrapper * Remove unintentional call to fetestexcept * Added inline assembly that will force clang's optimizer to give up and filed a clang bug * Adds some trailing spaces into some files. Re-enables all aarch64 tests. * Bringing the aarch64 branch back in line with master. * Adds in a test and ISEL for LDR_BL_LDST_REGOFF, and fixes up the instructions in some SMOV and UMOV tests. * Various fixes and some minor debugging aids for aarch64 * Resets the fenv before running lifted code. * All existing aarch64 tests should now pass.