Port the existing HEAD patch (0007) to stable as well.
FlowBlock::compareFinalOrder returns true when both blocks have
index 0, violating strict weak ordering irreflexivity. This is
caught by the libc++ assertions CI job.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
The sanitizer and assertions CI jobs provide more useful Debug-like
coverage on Linux than a plain Debug build. Keep Debug builds only for
Windows where sanitizers are not available.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Use the official LLVM apt script to install clang rather than relying
on whichever version happens to ship on the runner. The version is
configured via a workflow-level LLVM_VERSION env variable (currently 21)
so bumping is a one-line change.
The assertions job also installs the matching versioned libc++-dev and
libc++abi-dev packages.
Remove CMAKE_CXX_COMPILER from the ci-assertions preset so the CXX
environment variable is respected by CMake in both CI and local use.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Add a ci-assertions CMake preset that builds with libc++ in debug
hardening mode (_LIBCPP_HARDENING_MODE_DEBUG), which catches STL
contract violations at runtime — most importantly strict-weak ordering
violations in comparators passed to std::sort.
Add a corresponding assertions CI job that runs HEAD-only, since new
comparator bugs from upstream Ghidra surface there first.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Add a sanitizer CI job that builds and tests with AddressSanitizer and
UndefinedBehaviorSanitizer using clang on Ubuntu for both stable and
HEAD release tracks.
Fix three UBSAN signed left shift errors found during sanitizer testing
by casting signed values to unsigned before left shifting:
- address.hh sign_extend(): left shift of negative value / overflow
- slghpatexpress.cc LeftShiftExpression: left shift of negative value
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Provides a sandboxed Ubuntu 24.04 environment with LLVM 21
(clang, clangd, lld, lldb, libc++), cmake, ninja, and ccache
for building and debugging the decompiler with up-to-date tooling.
While there are only minimal VSCode extensions installed by default, I
automatically install Claude Code and my own dotfiles plus additional tools
* Bump Ghidra HEAD commit e3c1b6393
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/Makefile
M Ghidra/Features/Decompiler/src/decompile/cpp/address.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
A Ghidra/Features/Decompiler/src/decompile/cpp/bitfield.cc
A Ghidra/Features/Decompiler/src/decompile/cpp/bitfield.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/block.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/dynamic.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/flow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_block.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/grammar.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/grammar.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/grammar.y
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/opcodes.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/prettyprint.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/prettyprint.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printjava.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printlanguage.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printlanguage.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/type.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.hh
```
Commit details:
```
[Commit 1/2]
Hash: bf1f4288aa3b317e3c097773ba4b8e7b89ae09c7
Date: 2026-02-10 19:33:46 +0000
Message: GP-5922 Integer formatting for switch cases
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/block.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/flow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_block.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printjava.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printlanguage.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printlanguage.hh
[Commit 2/2]
Hash: 402d10d6cc66e1fcf3d8f36bc851ef652773e018
Date: 2025-09-05 00:01:44 +0000
Message: GP-2493 Bitfield support in the Decompiler
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/Makefile
M Ghidra/Features/Decompiler/src/decompile/cpp/address.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
A Ghidra/Features/Decompiler/src/decompile/cpp/bitfield.cc
A Ghidra/Features/Decompiler/src/decompile/cpp/bitfield.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/dynamic.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/grammar.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/grammar.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/grammar.y
M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/opcodes.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/prettyprint.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/prettyprint.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printlanguage.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printlanguage.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/type.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.hh
```
* Add new C++ files to CMake
* Fix more strict weak ordering issues
---------
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Co-authored-by: Eric Kilmer <eric.kilmer@trailofbits.com>
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_op.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc
M Ghidra/Processors/8051/data/languages/80251.sinc
M Ghidra/Processors/AARCH64/data/languages/AARCH64.pspec
M Ghidra/Processors/AARCH64/data/languages/AARCH64neon.sinc
M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
M Ghidra/Processors/CR16/data/languages/CR16C.sinc
M Ghidra/Processors/MIPS/data/languages/mips16.sinc
M Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
M Ghidra/Processors/PowerPC/data/languages/altivec.sinc
M Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
```
Commit details:
```
[Commit 1/19]
Hash: 1660b9ca4718c9907d279653a99c6d4190a1071f
Date: 2026-02-09 15:33:05 +0000
Message: GP-6419: Fixed MIPS16 pcodetest failures
Files changed:
M Ghidra/Processors/MIPS/data/languages/mips16.sinc
[Commit 2/19]
Hash: a05ba1f778511e92abc29c933cb17da9477cc7c5
Date: 2026-02-05 23:13:56 +0000
Message: GP-6416 Add support for simplifying unequal LEFT then RIGHT shifts
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
[Commit 3/19]
Hash: 690a23344f9de200056b8e7af4384e26f42e300b
Date: 2026-02-05 19:28:59 +0000
Message: GP-6393 Deduplicate INDIRECT storage for HeapSequence
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.hh
[Commit 4/19]
Hash: 6ced49d1d7fd91663e7627b11fc4e68dd06bca1c
Date: 2026-02-03 16:08:01 +0000
Message: GP-4241: Discoverable per-arch userop-lib framework and AARCH64 port.
Files changed:
M Ghidra/Processors/AARCH64/data/languages/AARCH64.pspec
[Commit 5/19]
Hash: 9a9b6cd063bc830c749804be0ab4213ec8de0010
Date: 2026-01-29 20:26:27 +0000
Message: GP-6388 Adjust getInputCast for TypeOpPtradd and TypeOpPtrsub
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc
[Commit 6/19]
Hash: c9be1860c181581ee192cb86e97eeec983a6bf00
Date: 2024-05-28 17:09:24 +0930
Message: AArch32: fixed ldrexd
Details:
* fixed addr src register aliased as first dest register of a double word load causing second word load at the value of first load
Files changed:
M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
[Commit 7/19]
Hash: c0bc9a882b7e6c6d3c0549c4410a8ae1abb68f00
Date: 2024-02-08 10:19:47 +0100
Message: PowerPC VLE: Fix se_blrl flow
Details:
Opcode se_blrl is branch link register and link. Treating it as a return break flow and is wrong. Non VLE is already correct.
Files changed:
M Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc
[Commit 8/19]
Hash: e94681701a89f34cf35edc18085684a8e40fc6b7
Date: 2025-12-02 02:03:52 +0100
Message: CR16: fix CR16C TBIT instruction
Files changed:
M Ghidra/Processors/CR16/data/languages/CR16C.sinc
[Commit 9/19]
Hash: af8a3704212b157d21bfddad834f6485fdfabeb1
Date: 2025-12-02 22:00:49 +0100
Message: Fix eBPF compare-and-exchange instruction
Details:
Linux kernel's documentation tells in
https://www.kernel.org/doc/html/v6.0/bpf/instruction-set.html#atomic-operations
> The BPF_CMPXCHG operation atomically compares the value addressed by
> dst_reg + off with R0. If they match, the value addressed by
> dst_reg + off is replaced with src_reg. In either case, the value that
> was at dst_reg + off before the operation is zero-extended and loaded
> back to R0.
If the values don't match, *(dst_reg + off) is not supposed to be
modified.
Moreover, register R0 is always modified and the 32-bit instruction
truncates its value (with a zero-extension). This is also clear in the
implementation of BPF_CMPXCHG in
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/kernel/bpf/core.c?h=v6.18#n2186
case BPF_CMPXCHG:
if (BPF_SIZE(insn->code) == BPF_W)
BPF_R0 = (u32) atomic_cmpxchg(
(atomic_t *)(unsigned long) (DST + insn->off),
(u32) BPF_R0, (u32) SRC);
else if (BPF_SIZE(insn->code) == BPF_DW)
BPF_R0 = (u64) atomic64_cmpxchg(
(atomic64_t *)(unsigned long) (DST + insn->off),
(u64) BPF_R0, (u64) SRC);
Fix the semantic of the compare-and-exchange instruction accordingly.
Files changed:
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
[Commit 10/19]
Hash: ff6eb2213bca878cdcef0e9cec20e524d8d9f944
Date: 2025-12-02 16:19:37 +0100
Message: Fix disassembly of eBPF atomic instructions
Details:
eBPF ISA v3 introduced atomic instructions:
https://www.kernel.org/doc/html/v6.0/bpf/instruction-set.html#atomic-operations
These instructions are encoded using BPF_ATOMIC | BPF_W | BPF_STX
and BPF_ATOMIC | BPF_DW | BPF_STX for 32-bit and 64-bit operations,
with:
BPF_ATOMIC = 0xc0
BPF_DW = 0x18
BPF_W = 0
BPF_STX = 0x03
While Ghidra's semantic section is constructed correctly (atomic add
uses an addition ; atomic or uses or ; ...), the disassembly always
displays STXXADDW and STXXADDDW. These mnemonics come from the
deprecated name BPF_XADD = BPF_ATOMIC | BPF_ADD = 0xc0.
Replace the confusing mnemonics with the ones used by binutils and
documented in
https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=gas/doc/c-bpf.texi;h=003cb92a457985038a9abc1ffbf347f636eb0586;hb=2bc7af1ff7732451b6a7b09462a815c3284f9613#l745
Files changed:
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
[Commit 11/19]
Hash: c1f97cde08ab235c0fe9adb723971a608550fdc2
Date: 2025-12-22 19:47:24 +0100
Message: Fix missing Altivec vadduws instruction
Files changed:
M Ghidra/Processors/PowerPC/data/languages/altivec.sinc
[Commit 12/19]
Hash: c981c0b5dd19818117178f3ce4a9d8737c306e65
Date: 2025-12-16 20:07:56 +0000
Message: GP-6004: Refactored out duplicated constructors
Files changed:
M Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
[Commit 13/19]
Hash: 78859d55fdf28dfbe9dac0658948754515d44e36
Date: 2025-12-04 19:25:56 +0000
Message: GP-5905: Fixed issue with 80251 instructions referencing SPX register
Files changed:
M Ghidra/Processors/8051/data/languages/80251.sinc
[Commit 14/19]
Hash: 826834c424b631358f06899dfd0203138ba2cb7d
Date: 2025-11-25 13:32:37 +0100
Message: decompiler: Fix extreme value checks in Funcdata::replaceLessequal
Details:
Fixes https://github.com/NationalSecurityAgency/ghidra/issues/8696
The checks for extreme values when transforming <= to < were incomplete
and relied on undefined behavior, making compilers optimize them out.
Specifically, for SLESS_EQUAL, the decompiler relied on integer overflows.
For integers smaller than 8 bytes, no overflow will occur when adding 1,
resulting in a missed case and, thus, x <= INT_MAX will become x < INT_MIN.
For the signed case when subtracting one, the compiler removes the check
due to undefined behavior, resulting in another missed case.
To fix this, add helper functions for computing maximum and minimum values
for signed and unsigned varnodes and directly check for them.
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_op.cc
[Commit 15/19]
Hash: 2e3bedf7daf1c5c38cbf1c3f90b6f4cd449f7020
Date: 2025-11-04 13:50:15 +0000
Message: GP-6004: Corrected bit-pattern comments
Files changed:
M Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
[Commit 16/19]
Hash: 49c13a7ba733f2af63f3d33d83cba8103456249e
Date: 2025-09-17 10:43:57 +0200
Message: missed one
Files changed:
M Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
[Commit 17/19]
Hash: 48ca4badb7ea2eb18ffd6f9b6ede356932160067
Date: 2025-09-13 16:17:07 -0700
Message: forgot to take out this change
Files changed:
M Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
[Commit 18/19]
Hash: 7fa6bda98ee9a350be49c0b4a8f9cf8c83b39490
Date: 2025-09-10 00:58:15 -0700
Message: remove destREG to fix double inc/dec
Files changed:
M Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
[Commit 19/19]
Hash: 5e4522fc3a2a547c9b1c94ab293890bb9f767ac3
Date: 2024-04-09 16:43:13 +0930
Message: AA64: Change sha1h shift to rotate
Files changed:
M Ghidra/Processors/AARCH64/data/languages/AARCH64neon.sinc
```
---------
Co-authored-by: Eric Kilmer <eric.d.kilmer@gmail.com>
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Add functionality to the weekly sync workflow to detect newly added or
deleted C++ source files and spec files that may require manual CMake
configuration updates. When such files are detected, the PR body will
include a warning section listing the files and instructions for
maintainers.
This addresses issue #121 where new files added to Sleigh in Ghidra
weren't being noticed, leading to missing headers that required manual
fixes later.
Changes:
- Add CategorizedChanges dataclass to track added/deleted cpp/spec files
- Add helper methods to parse git status and categorize files
- Expand IGNORED_EXTENSIONS to filter more non-relevant file types
- Set new GitHub Actions outputs: needs_manual_intervention and
intervention_details
- Update workflow to conditionally add warning section to PR body
Co-authored-by: Claude Opus 4.5 <noreply@anthropic.com>
Reduces third-party dependencies by using native git commands and the
pre-installed gh CLI instead of the peter-evans/create-pull-request
action. Adds idempotency check to skip if PR already exists for branch.
Co-authored-by: Claude Opus 4.5 <noreply@anthropic.com>
Bump Ghidra HEAD commit 549735683
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/sleighbase.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/slghparse.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slghparse.y
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.hh
M Ghidra/Processors/RISCV/data/languages/riscv.opinion
```
Commit details:
```
[Commit 1/7]
Hash: 6208df2d50d716b4faf87d3a0c0603d45aac4cb3
Date: 2026-01-13 10:44:59 -0500
Message: GP-1 Corrected RISCV import opinion file
Files changed:
M Ghidra/Processors/RISCV/data/languages/riscv.opinion
[Commit 2/7]
Hash: 1789bb9c5e66cb1e5ad2072b73c4bf7fbc713f67
Date: 2026-01-12 21:00:06 -0500
Message: GP-1 minor doc fix
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
[Commit 3/7]
Hash: 7828f235d315807d18ecb873fad34b209a02ce65
Date: 2026-01-12 21:51:54 +0000
Message: GP-6316 Increase maximum temporary size for SLEIGH to 256 bytes
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/sleighbase.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh
[Commit 4/7]
Hash: 4830a7ab99548aa898e861b967f48c92dd741f48
Date: 2026-01-12 19:33:12 +0000
Message: GP-6314 Reset label counter for every named section
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/slghparse.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slghparse.y
[Commit 5/7]
Hash: 123bd5cbe6d54105c96bb8a0b5c1b81f84b29e97
Date: 2026-01-09 20:37:38 +0000
Message: GP-6310 Apply extension patch if consumption is beyond small variable
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.hh
[Commit 6/7]
Hash: 451334568f3200f453b6b3985b5949f72747f1c6
Date: 2026-01-09 20:15:16 +0000
Message: Let RuleShiftAnd apply in more situations
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
[Commit 7/7]
Hash: 92091a7a2ad59309514d808c7eb890492f5c49e8
Date: 2025-12-02 10:59:10 +0100
Message: decompiler: fix bit extractions with RuleShiftAnd and RuleShiftCompare
Details:
Fixes https://github.com/NationalSecurityAgency/ghidra/issues/8717
RuleShiftAnd previously replaced the AND opcode with COPY. This,
however doesn't update the NZMask of the Varnode. As a result, following
rules may assume the NZMask after the AND operation also applies to the
Varnode being copied.
In combination with RuleShiftCompare, an expression of the form
(a & bitmask) >> const != 0, wrongfully is reduced to a != 0.
Instead of replacing the AND with COPY, we now replace the input
of the shift operation instead. This way, future rules will see
the correct NZMask.
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
```
Bump Ghidra HEAD commit 6ef256cef
Changed files:
```
M Ghidra/Processors/AARCH64/data/languages/AARCH64.ldefs
M Ghidra/Processors/AARCH64/data/languages/AARCH64.opinion
M Ghidra/Processors/x86/data/languages/x86.opinion
```
Commit details:
```
[Commit 1/1]
Hash: ad00d5734f82266e7d58624a36075da33d8e3005
Date: 2025-12-23 19:04:43 -0500
Message: GP-3960: ElfLoader can now recognize Swift and golang
Files changed:
M Ghidra/Processors/AARCH64/data/languages/AARCH64.ldefs
M Ghidra/Processors/AARCH64/data/languages/AARCH64.opinion
M Ghidra/Processors/x86/data/languages/x86.opinion
```
Bump Ghidra HEAD commit dc5836119
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/sleigh.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
```
Commit details:
```
[Commit 1/4]
Hash: 19836741896fd7664c9de9519a8841f9b593ae9f
Date: 2025-12-17 19:52:07 +0000
Message: GP-6237 Move the unique crossbuild region to more significant bits
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/sleigh.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh
[Commit 2/4]
Hash: b8e698d97804de62a7dbf6664b0e3f264725c3d9
Date: 2025-09-12 20:10:43 +0000
Message: GP-3834 Allow 256 case switch, if a LOAD is present
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
[Commit 3/4]
Hash: 6451d3d3135ba72a4c50f40667ad893b2c944de6
Date: 2025-12-12 00:17:12 +0000
Message: GP-6224 Don't resolve pointer if cast still required
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh
[Commit 4/4]
Hash: 9692dd064064ee712d8a724984f1b6b2bec4bc75
Date: 2025-12-10 19:26:03 +0000
Message: GP-6201 Check for free varnodes in functionalEqualityLevel0
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
```
Bump Ghidra HEAD commit d83ea1754
Changed files:
```
A Ghidra/Processors/NDS32/Module.manifest
A Ghidra/Processors/NDS32/build.gradle
A Ghidra/Processors/NDS32/certification.manifest
A Ghidra/Processors/NDS32/data/languages/lsmw.sinc
A Ghidra/Processors/NDS32/data/languages/nds32.cspec
A Ghidra/Processors/NDS32/data/languages/nds32.dwarf
A Ghidra/Processors/NDS32/data/languages/nds32.ldefs
A Ghidra/Processors/NDS32/data/languages/nds32.opinion
A Ghidra/Processors/NDS32/data/languages/nds32.pspec
A Ghidra/Processors/NDS32/data/languages/nds32.sinc
A Ghidra/Processors/NDS32/data/languages/nds32be.slaspec
A Ghidra/Processors/NDS32/data/languages/nds32le.slaspec
A Ghidra/Processors/NDS32/data/patterns/nds32_patterns.xml
A Ghidra/Processors/NDS32/data/patterns/patternconstraints.xml
M Ghidra/Processors/RISCV/data/languages/andestar_v5.instr.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.reg.sinc
```
Commit details:
```
[Commit 1/9]
Hash: d0f88bf9023ac412b50460fe9e0ac5fc76f14d90
Date: 2025-12-04 12:28:50 -0500
Message: GP-6007 Remove Decompiler dependency
Files changed:
M Ghidra/Processors/NDS32/build.gradle
[Commit 2/9]
Hash: 923ceb52d4727a2227a8b2512593ec4fb03ab0e2
Date: 2025-12-04 11:25:54 -0500
Message: GP-6007 use -l sleigh compile option with NDS32
Files changed:
M Ghidra/Processors/NDS32/build.gradle
[Commit 3/9]
Hash: ddf4ad1182577f759b1c0e7c40d8825abd65b357
Date: 2025-12-03 22:06:38 +0000
Message: GP-6007 minor fixes for Andestar v5
Files changed:
M Ghidra/Processors/RISCV/data/languages/andestar_v5.instr.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.reg.sinc
[Commit 4/9]
Hash: 2efa886f5ca0996d3ea9f1865d952aa2708389b6
Date: 2025-12-03 21:36:18 +0000
Message: GP-6007 minor fixes for mfusr, mtusr and csreg space as global in cspec
Files changed:
M Ghidra/Processors/NDS32/data/languages/nds32.cspec
M Ghidra/Processors/NDS32/data/languages/nds32.sinc
[Commit 5/9]
Hash: df6e4049d4f91f8cb9c9ff3888bb5f2a15a411d8
Date: 2025-12-02 20:21:14 +0000
Message: GP-6007: Added additional floating point config instructions
Files changed:
M Ghidra/Processors/NDS32/data/languages/nds32.sinc
[Commit 6/9]
Hash: 9bdd19cc087f889a16421b7cda082e2a08653449
Date: 2025-12-02 15:30:45 +0000
Message: GP-6007: Added CSR space and CSRs
Files changed:
M Ghidra/Processors/NDS32/data/languages/lsmw.sinc
M Ghidra/Processors/NDS32/data/languages/nds32.pspec
M Ghidra/Processors/NDS32/data/languages/nds32.sinc
[Commit 7/9]
Hash: ed4ae8bfa1f6b5db8c7356b2a4253c4c647e65f4
Date: 2025-11-26 20:19:40 +0000
Message: GP-6007: Added stubs for nds32 FPU instructions
Files changed:
M Ghidra/Processors/NDS32/build.gradle
M Ghidra/Processors/NDS32/data/languages/nds32.ldefs
M Ghidra/Processors/NDS32/data/languages/nds32.sinc
M Ghidra/Processors/NDS32/data/patterns/nds32_patterns.xml
[Commit 8/9]
Hash: 71cd33572c873b1eebd322032506c259632d0d52
Date: 2025-09-22 14:37:16 +0000
Message: GP-6007: Updated NDS32 analyzer and elf relocation handler and test fixups
Files changed:
M Ghidra/Processors/NDS32/build.gradle
A Ghidra/Processors/NDS32/certification.manifest
D Ghidra/Processors/NDS32/data/buildLanguage.xml
M Ghidra/Processors/NDS32/data/languages/lsmw.sinc
M Ghidra/Processors/NDS32/data/languages/nds32.cspec
M Ghidra/Processors/NDS32/data/languages/nds32.sinc
M Ghidra/Processors/NDS32/data/languages/nds32be.slaspec
M Ghidra/Processors/NDS32/data/languages/nds32le.slaspec
D Ghidra/Processors/NDS32/data/sleighArgs.txt
[Commit 9/9]
Hash: fa7c3b1fec5e133f5147b6c541d023c646c0b170
Date: 2020-04-16 18:58:10 +0200
Message: [NDS32] Add support for the NDS32 Processor
Files changed:
A Ghidra/Processors/NDS32/Module.manifest
A Ghidra/Processors/NDS32/build.gradle
A Ghidra/Processors/NDS32/data/buildLanguage.xml
A Ghidra/Processors/NDS32/data/languages/lsmw.sinc
A Ghidra/Processors/NDS32/data/languages/nds32.cspec
A Ghidra/Processors/NDS32/data/languages/nds32.dwarf
A Ghidra/Processors/NDS32/data/languages/nds32.ldefs
A Ghidra/Processors/NDS32/data/languages/nds32.opinion
A Ghidra/Processors/NDS32/data/languages/nds32.pspec
A Ghidra/Processors/NDS32/data/languages/nds32.sinc
A Ghidra/Processors/NDS32/data/languages/nds32be.slaspec
A Ghidra/Processors/NDS32/data/languages/nds32le.slaspec
A Ghidra/Processors/NDS32/data/patterns/nds32_patterns.xml
A Ghidra/Processors/NDS32/data/patterns/patternconstraints.xml
A Ghidra/Processors/NDS32/data/sleighArgs.txt
```
Bump Ghidra HEAD commit be482754a
Changed files:
```
M Ghidra/Processors/ARM/data/languages/ARM.ldefs
M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
M Ghidra/Processors/ARM/data/patterns/ARM_BE_patterns.xml
M Ghidra/Processors/ARM/data/patterns/ARM_LE_patterns.xml
M Ghidra/Processors/PowerPC/data/patterns/PPC_BE_patterns.xml
M Ghidra/Processors/PowerPC/data/patterns/PPC_LE_patterns.xml
M Ghidra/Processors/RISCV/certification.manifest
A Ghidra/Processors/RISCV/data/languages/RV32.pspec
D Ghidra/Processors/RISCV/data/languages/RV32G.pspec
D Ghidra/Processors/RISCV/data/languages/RV32GC.pspec
D Ghidra/Processors/RISCV/data/languages/RV32I.pspec
D Ghidra/Processors/RISCV/data/languages/RV32IC.pspec
D Ghidra/Processors/RISCV/data/languages/RV32IMC.pspec
A Ghidra/Processors/RISCV/data/languages/RV64.pspec
D Ghidra/Processors/RISCV/data/languages/RV64G.pspec
D Ghidra/Processors/RISCV/data/languages/RV64GC.pspec
D Ghidra/Processors/RISCV/data/languages/RV64I.pspec
D Ghidra/Processors/RISCV/data/languages/RV64IC.pspec
A Ghidra/Processors/RISCV/data/languages/andestar_v5.instr.sinc
A Ghidra/Processors/RISCV/data/languages/andestar_v5.ldefs
A Ghidra/Processors/RISCV/data/languages/andestar_v5.slaspec
A Ghidra/Processors/RISCV/data/languages/old/riscv_deprecated.ldefs
M Ghidra/Processors/RISCV/data/languages/riscv.csr.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.ilp32d.slaspec
M Ghidra/Processors/RISCV/data/languages/riscv.instr.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.ldefs
M Ghidra/Processors/RISCV/data/languages/riscv.lp64d.slaspec
M Ghidra/Processors/RISCV/data/languages/riscv.reg.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.rvc.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.rvv.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.table.sinc
M Ghidra/Processors/RISCV/data/languages/riscv32-fp.cspec
M Ghidra/Processors/RISCV/data/languages/riscv32.cspec
M Ghidra/Processors/RISCV/data/languages/riscv64-fp.cspec
M Ghidra/Processors/RISCV/data/languages/riscv64.cspec
M Ghidra/Processors/SuperH/data/languages/superh.sinc
M Ghidra/Processors/Xtensa/data/languages/xtensaArch.sinc
M Ghidra/Processors/Xtensa/data/languages/xtensaInstructions.sinc
```
Commit details:
```
[Commit 1/6]
Hash: c3a2482e186185c86ba98b93044aa032fad48ce2
Date: 2025-11-05 14:39:41 -0500
Message: GP-5975 Eliminated unused NotFoundException from Memory methods. Revised import to always include pspec symbols within pcode-defined memory blocks. Added label name check. Revised language version upgrade to handle certain pspec-defined block and symbol changes. Corrected RISC-V 64-bit-fp cspec.
Files changed:
M Ghidra/Processors/RISCV/certification.manifest
A Ghidra/Processors/RISCV/data/languages/old/riscv_deprecated.ldefs
M Ghidra/Processors/RISCV/data/languages/riscv.ldefs
M Ghidra/Processors/RISCV/data/languages/riscv64-fp.cspec
[Commit 2/6]
Hash: ade1ad71ba5b80e910fcd98ad688f658439724a5
Date: 2025-09-30 17:08:48 +0000
Message: GP-5975 Refactored RISCV custom instruction, sinc file layout, simplified context, and moved csr register definitions to be in a special csreg ram space. Deprecated all most RISCV variants other than default. Added andestar V5 RISCV variant.
Files changed:
M Ghidra/Processors/RISCV/certification.manifest
A Ghidra/Processors/RISCV/data/languages/RV32.pspec
D Ghidra/Processors/RISCV/data/languages/RV32G.pspec
D Ghidra/Processors/RISCV/data/languages/RV32GC.pspec
D Ghidra/Processors/RISCV/data/languages/RV32I.pspec
D Ghidra/Processors/RISCV/data/languages/RV32IC.pspec
D Ghidra/Processors/RISCV/data/languages/RV32IMC.pspec
A Ghidra/Processors/RISCV/data/languages/RV64.pspec
D Ghidra/Processors/RISCV/data/languages/RV64G.pspec
D Ghidra/Processors/RISCV/data/languages/RV64GC.pspec
D Ghidra/Processors/RISCV/data/languages/RV64I.pspec
D Ghidra/Processors/RISCV/data/languages/RV64IC.pspec
A Ghidra/Processors/RISCV/data/languages/andestar_v5.instr.sinc
A Ghidra/Processors/RISCV/data/languages/andestar_v5.ldefs
A Ghidra/Processors/RISCV/data/languages/andestar_v5.slaspec
M Ghidra/Processors/RISCV/data/languages/riscv.csr.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.ilp32d.slaspec
M Ghidra/Processors/RISCV/data/languages/riscv.instr.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.ldefs
M Ghidra/Processors/RISCV/data/languages/riscv.lp64d.slaspec
M Ghidra/Processors/RISCV/data/languages/riscv.reg.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.rvc.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.rvv.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.table.sinc
M Ghidra/Processors/RISCV/data/languages/riscv32-fp.cspec
M Ghidra/Processors/RISCV/data/languages/riscv32.cspec
M Ghidra/Processors/RISCV/data/languages/riscv64.cspec
[Commit 3/6]
Hash: 0b60036f8fd0dd3cc70233fd3294d38755b7b525
Date: 2025-10-19 17:36:58 +0300
Message: SuperH fix 'bclr' opcode
Files changed:
M Ghidra/Processors/SuperH/data/languages/superh.sinc
[Commit 4/6]
Hash: 2419b08085dbfdf9a0ae8934526ebc7c30abce87
Date: 2025-11-06 18:47:35 +0000
Message: GP-6072 Fixed thunk detection and thunk address for Position Independent Code thunks that call to load a link register that is turned into a jump.
Files changed:
M Ghidra/Processors/PowerPC/data/patterns/PPC_BE_patterns.xml
M Ghidra/Processors/PowerPC/data/patterns/PPC_LE_patterns.xml
[Commit 5/6]
Hash: 3a0736f2647e5c095222473cebbdcad6a25c13a4
Date: 2025-10-03 15:47:44 -0500
Message: Xtensa: BE: Corrected decoding of the following instructions: BBCI, BBSI, BEQZ.N, BNEZ.N, DEPBITS, EXTUI, LDDEC, LDINC, MOVI.N, MUL.AD.*, MULA.AD.*, MUL.DA.*, MUL.DD.*, MULA.DA.*, MULA.DD.*, SLLI, SRAI, SSAI (Closes#8544, Closes#8537)
Files changed:
M Ghidra/Processors/Xtensa/data/languages/xtensaArch.sinc
M Ghidra/Processors/Xtensa/data/languages/xtensaInstructions.sinc
[Commit 6/6]
Hash: 5924914b47881f5ab936b52ac7649493cb2268c9
Date: 2025-10-30 20:21:11 +0000
Message: GP-6079 ARM instruction CPY into PC with LR set before it is now a call. Also fixed a function start pattern, and spurious references placed on stack save of the PC.
Files changed:
M Ghidra/Processors/ARM/data/languages/ARM.ldefs
M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
M Ghidra/Processors/ARM/data/patterns/ARM_BE_patterns.xml
M Ghidra/Processors/ARM/data/patterns/ARM_LE_patterns.xml
```
Bump Ghidra HEAD commit 4b1fd2254
Changed files:
```
M Ghidra/Processors/PA-RISC/data/languages/pa-risc.opinion
M Ghidra/Processors/x86/certification.manifest
A Ghidra/Processors/x86/data/extensions/rust/unix32/cc.xml
R100 Ghidra/Processors/x86/data/extensions/rust/unix/probe_fixup.xml Ghidra/Processors/x86/data/extensions/rust/unix32/probe_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/unix32/try_fixup.xml
R100 Ghidra/Processors/x86/data/extensions/rust/unix/cc.xml Ghidra/Processors/x86/data/extensions/rust/unix64/cc.xml
R100 Ghidra/Processors/x86/data/extensions/rust/windows/probe_fixup.xml Ghidra/Processors/x86/data/extensions/rust/unix64/probe_fixup.xml
R100 Ghidra/Processors/x86/data/extensions/rust/unix/try_fixup.xml Ghidra/Processors/x86/data/extensions/rust/unix64/try_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows32/probe_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows32/try_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows64/probe_fixup.xml
R100 Ghidra/Processors/x86/data/extensions/rust/windows/try_fixup.xml Ghidra/Processors/x86/data/extensions/rust/windows64/try_fixup.xml
```
Commit details:
```
[Commit 1/2]
Hash: bb63706226732c5f0c14cf01ae934a2cd6622fb6
Date: 2025-10-09 08:06:13 -0400
Message: GP-5942: Loader for "System Object Model" binaries
Files changed:
M Ghidra/Processors/PA-RISC/data/languages/pa-risc.opinion
[Commit 2/2]
Hash: 95ad48cdb371aeef15892767f4962ab1712db86f
Date: 2025-10-28 17:22:13 +0000
Message: GP-4711 Fix for import of 32-bit x86 Unix/Windows Rust binaries
Files changed:
M Ghidra/Processors/x86/certification.manifest
D Ghidra/Processors/x86/data/extensions/rust/unix/cc.xml
D Ghidra/Processors/x86/data/extensions/rust/unix/probe_fixup.xml
D Ghidra/Processors/x86/data/extensions/rust/unix/try_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/unix32/cc.xml
A Ghidra/Processors/x86/data/extensions/rust/unix32/probe_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/unix32/try_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/unix64/cc.xml
A Ghidra/Processors/x86/data/extensions/rust/unix64/probe_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/unix64/try_fixup.xml
D Ghidra/Processors/x86/data/extensions/rust/windows/probe_fixup.xml
D Ghidra/Processors/x86/data/extensions/rust/windows/try_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows32/probe_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows32/try_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows64/probe_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows64/try_fixup.xml
```
Co-authored-by: pgoodman <43664+pgoodman@users.noreply.github.com>
Bump Ghidra HEAD commit 96506554e
Changed files:
```
M Ghidra/Processors/AARCH64/certification.manifest
A Ghidra/Processors/AARCH64/data/languages/AARCH64_apple.cspec
M Ghidra/Processors/AARCH64/data/languages/AppleSilicon.ldefs
M Ghidra/Processors/x86/data/languages/x86-64-win.cspec
M Ghidra/Processors/x86/data/languages/x86win.cspec
M Ghidra/Processors/x86/data/patterns/x86-64gcc_patterns.xml
M Ghidra/Processors/x86/data/patterns/x86-64win_patterns.xml
M Ghidra/Processors/x86/data/patterns/x86gcc_patterns.xml
M Ghidra/Processors/x86/data/patterns/x86gcc_prepatterns.xml
M Ghidra/Processors/x86/data/patterns/x86win_patterns.xml
```
Commit details:
```
[Commit 1/4]
Hash: dc069a18c602b71dbbb3bb7d150adb5b39565b8f
Date: 2025-09-24 18:06:03 +0000
Message: GP-5287 Added ENDBR jump target checking instructions as function start patterns for x86 gcc binaries
Files changed:
M Ghidra/Processors/x86/data/patterns/x86-64gcc_patterns.xml
M Ghidra/Processors/x86/data/patterns/x86gcc_patterns.xml
[Commit 2/4]
Hash: 69ed84a069255d06e500691dfd9229067bb8b209
Date: 2025-09-24 18:03:10 +0000
Message: GP-5526 bug fix for .plt.sec and pattern matching optimization
Files changed:
M Ghidra/Processors/x86/data/patterns/x86gcc_prepatterns.xml
[Commit 3/4]
Hash: 0815f463f543e0f09e582de612e04b612460bc4d
Date: 2025-09-24 18:01:43 +0000
Message: GP-5998 Added security_check_cookie function patterns and callfixup for VS2022 based binaries.
Files changed:
M Ghidra/Processors/x86/data/languages/x86-64-win.cspec
M Ghidra/Processors/x86/data/languages/x86win.cspec
M Ghidra/Processors/x86/data/patterns/x86-64win_patterns.xml
M Ghidra/Processors/x86/data/patterns/x86win_patterns.xml
[Commit 4/4]
Hash: 6e81a370ce02a1e9e65fe7d9d02240e8773ec8bb
Date: 2025-09-11 17:36:37 +0000
Message: GP-3139 added cspec for AARCH64 apple silicon
Files changed:
M Ghidra/Processors/AARCH64/certification.manifest
A Ghidra/Processors/AARCH64/data/languages/AARCH64_apple.cspec
M Ghidra/Processors/AARCH64/data/languages/AppleSilicon.ldefs
```
Bump Ghidra HEAD commit 1ae4378cf
Changed files:
```
M Ghidra/Processors/Atmel/data/languages/avr32a_instruction_flow.sinc
M Ghidra/Processors/tricore/data/languages/tricore.ldefs
M Ghidra/Processors/x86/certification.manifest
M Ghidra/Processors/x86/data/patterns/prepatternconstraints.xml
A Ghidra/Processors/x86/data/patterns/x86gcc_prepatterns.xml
```
Commit details:
```
[Commit 1/4]
Hash: 24b2275c0b7bbdb30243d6b3877d0a5fb852243a
Date: 2023-09-05 10:03:20 -0400
Message: tmp assigned rd0 instead of LR
Files changed:
M Ghidra/Processors/Atmel/data/languages/avr32a_instruction_flow.sinc
[Commit 2/4]
Hash: be7458a4369e8b0ec0988f96d33a71b33912e750
Date: 2023-08-29 09:24:37 -0400
Message: Update avr32a_instruction_flow.sinc
Details:
The specification for avr32 says the LR register should be reserved for using return addresses, but in reality older compilers seem to use it to hold addresses for ICALL. When they do so without this fix the value in LR is immediately overwritten and during analysis only appears to be a function call to the opcode immediately after ICALL.
Files changed:
M Ghidra/Processors/Atmel/data/languages/avr32a_instruction_flow.sinc
[Commit 3/4]
Hash: 4b6d90366c8569b5d780dd14a74445957db55582
Date: 2025-09-10 22:55:14 +0000
Message: GP-5526 Added section tag to function start patterns. New thunk patterns in x86 gcc .plt section. Changed priority of pre analyzer and disassembly.
Files changed:
M Ghidra/Processors/x86/certification.manifest
M Ghidra/Processors/x86/data/patterns/prepatternconstraints.xml
A Ghidra/Processors/x86/data/patterns/x86gcc_prepatterns.xml
[Commit 4/4]
Hash: 18a7f952c89be6951f4b3bf549a54daff5720cfd
Date: 2024-11-08 15:39:42 +0100
Message: Processors: Rename TriCore Siemens to Infineon
Files changed:
M Ghidra/Processors/tricore/data/languages/tricore.ldefs
```
Bump Ghidra HEAD commit 970c8fbdd
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
M Ghidra/Features/Decompiler/src/decompile/datatests/condexesub.xml
```
Commit details:
```
[Commit 1/1]
Hash: ce09332fcdd011758d23a2505eced5949ffcc253
Date: 2025-09-02 18:17:49 +0000
Message: GP-4214 Allow INT_ADD in the iblock
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
M Ghidra/Features/Decompiler/src/decompile/datatests/condexesub.xml
```
Eric Kilmer