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hw-spi: add SPI peripheral gem for embedded platforms
Add hw-spi gem with SPI communication support: - Common Ruby API with write, read, and full-duplex transfer - ports/esp32/ using ESP-IDF SPI master driver - ports/rp2040/ using Pico SDK Based on picoruby-spi by HASUMI Hitoshi. Co-authored-by: Claude <noreply@anthropic.com>
This commit is contained in:
Yukihiro "Matz" Matsumoto
@@ -0,0 +1,113 @@
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# hw-spi - SPI peripheral interface for mruby
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This gem provides the `SPI` class for Serial Peripheral Interface
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communication from mruby. It is designed for embedded platforms
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such as ESP32 and RP2040.
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## Architecture
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Platform-specific HAL implementations are in `ports/` directories:
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- `ports/esp32/` - ESP32 using ESP-IDF SPI master driver
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- `ports/rp2040/` - RP2040 using Pico SDK
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The build system automatically compiles matching port sources based
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on `conf.ports` setting.
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## Build Configuration
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```ruby
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MRuby::CrossBuild.new('esp32') do |conf|
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conf.ports :esp32
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conf.gem core: 'hw-spi'
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end
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```
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## Ruby API
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### SPI.new
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```ruby
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spi = SPI.new(
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unit: :RP2040_SPI0, # SPI unit name (required)
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frequency: 100_000, # clock frequency in Hz (default: 100kHz)
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sck_pin: -1, # SCK GPIO pin (default: platform default)
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copi_pin: -1, # COPI/MOSI GPIO pin
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cipo_pin: -1, # CIPO/MISO GPIO pin
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cs_pin: -1, # CS GPIO pin (-1 for manual control)
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mode: 0, # SPI mode 0-3 (default: 0)
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first_bit: SPI::MSB_FIRST # bit order (default: MSB_FIRST)
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)
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```
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#### Unit Names
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| Platform | Available Units |
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|----------|-----------------------------------------------------|
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| ESP32 | `:ESP32_SPI2_HOST`, `:ESP32_HSPI_HOST`, |
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| | `:ESP32_SPI3_HOST`\*, `:ESP32_VSPI_HOST`\* |
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| RP2040 | `:RP2040_SPI0`, `:RP2040_SPI1` |
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\*SPI3 availability depends on ESP32 variant.
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### SPI#write(*data)
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Write data to the SPI bus. Data can be Integer, Array, or String.
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```ruby
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spi.write(0x01, [0x02, 0x03])
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```
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### SPI#read(len, tx_value = 0)
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Read `len` bytes. Optionally specify the value to transmit during
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read.
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```ruby
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data = spi.read(4) # transmits 0x00 while reading
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data = spi.read(4, 0xFF) # transmits 0xFF while reading
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```
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### SPI#transfer(*data, additional_read_bytes: 0)
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Full-duplex transfer. Sends data and returns received bytes.
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Use `additional_read_bytes:` to append zero-filled read bytes.
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```ruby
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# Send 1 byte command, read 4 bytes response
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rx = spi.transfer(0x9F, additional_read_bytes: 4)
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```
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### SPI#select / SPI#deselect
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Manually control the CS pin (when using GPIO-based chip select).
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```ruby
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spi.select do |s|
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s.write(0x01)
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data = s.read(4)
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end # CS automatically deasserted
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```
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## HAL Interface
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To add support for a new platform, create a `ports/<name>/`
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directory and implement the following C functions declared in
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`<mruby/spi.h>`:
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```c
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int mrb_spi_unit_name_to_num(const char *name);
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mrb_spi_status mrb_spi_init(mrb_spi_info *info);
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int mrb_spi_read(mrb_spi_info *info, uint8_t *dst, size_t len,
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uint8_t tx_val);
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int mrb_spi_write(mrb_spi_info *info, const uint8_t *src, size_t len);
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int mrb_spi_transfer(mrb_spi_info *info, const uint8_t *tx,
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uint8_t *rx, size_t len);
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```
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The `mrb_spi_info` struct contains all configuration (unit, pins,
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frequency, mode, bit order) and is passed to every HAL call.
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## License
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MIT
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@@ -0,0 +1,44 @@
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#ifndef MRUBY_SPI_H
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#define MRUBY_SPI_H
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#include <stdint.h>
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#include <stddef.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define MRB_SPI_MSB_FIRST 1
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#define MRB_SPI_LSB_FIRST 0
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typedef enum {
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MRB_SPI_OK = 0,
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MRB_SPI_ERROR_UNIT = -1,
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MRB_SPI_ERROR_MODE = -2,
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MRB_SPI_ERROR_FIRST_BIT = -3,
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MRB_SPI_ERROR_INIT = -4,
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} mrb_spi_status;
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typedef struct {
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uint32_t frequency;
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uint8_t unit_num;
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int8_t sck_pin;
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int8_t copi_pin;
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int8_t cipo_pin;
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int8_t cs_pin;
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uint8_t mode;
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uint8_t first_bit;
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} mrb_spi_info;
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/* HAL functions - implemented in ports/<platform>/spi.c */
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int mrb_spi_unit_name_to_num(const char *name);
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mrb_spi_status mrb_spi_init(mrb_spi_info *info);
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int mrb_spi_read(mrb_spi_info *info, uint8_t *dst, size_t len, uint8_t tx_val);
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int mrb_spi_write(mrb_spi_info *info, const uint8_t *src, size_t len);
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int mrb_spi_transfer(mrb_spi_info *info, const uint8_t *tx, uint8_t *rx, size_t len);
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#ifdef __cplusplus
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}
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#endif
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#endif /* MRUBY_SPI_H */
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@@ -0,0 +1,5 @@
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MRuby::Gem::Specification.new('hw-spi') do |spec|
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spec.license = 'MIT'
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spec.authors = ['HASUMI Hitoshi', 'mruby developers']
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spec.summary = 'SPI peripheral interface'
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end
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@@ -0,0 +1,20 @@
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class SPI
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MSB_FIRST = 1
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LSB_FIRST = 0
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DEFAULT_FREQUENCY = 100_000
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def select
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@cs&.write 0
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if block_given?
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begin
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yield self
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ensure
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deselect
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end
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end
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end
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def deselect
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@cs&.write 1
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end
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end
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@@ -0,0 +1,85 @@
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#include <string.h>
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#include "driver/spi_master.h"
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#include <mruby/spi.h>
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static spi_device_handle_t handles[SPI_HOST_MAX];
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int
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mrb_spi_unit_name_to_num(const char *name)
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{
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if (strcmp(name, "ESP32_SPI2_HOST") == 0) return SPI2_HOST;
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if (strcmp(name, "ESP32_HSPI_HOST") == 0) return SPI2_HOST;
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#if (SOC_SPI_PERIPH_NUM == 3)
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if (strcmp(name, "ESP32_SPI3_HOST") == 0) return SPI3_HOST;
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if (strcmp(name, "ESP32_VSPI_HOST") == 0) return SPI3_HOST;
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#endif
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return MRB_SPI_ERROR_UNIT;
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}
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mrb_spi_status
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mrb_spi_init(mrb_spi_info *info)
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{
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if (handles[info->unit_num] != NULL) return MRB_SPI_OK;
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spi_bus_config_t buscfg = {
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.mosi_io_num = info->copi_pin,
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.miso_io_num = info->cipo_pin,
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.sclk_io_num = info->sck_pin,
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.quadwp_io_num = -1,
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.quadhd_io_num = -1,
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};
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esp_err_t err = spi_bus_initialize(info->unit_num, &buscfg, SPI_DMA_CH_AUTO);
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if (err != ESP_OK) return MRB_SPI_ERROR_INIT;
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spi_device_interface_config_t devcfg = {
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.clock_speed_hz = info->frequency,
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.mode = info->mode,
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.spics_io_num = info->cs_pin,
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.queue_size = 7,
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};
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err = spi_bus_add_device(info->unit_num, &devcfg, &handles[info->unit_num]);
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if (err != ESP_OK) {
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spi_bus_free(info->unit_num);
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handles[info->unit_num] = NULL;
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return MRB_SPI_ERROR_INIT;
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}
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return MRB_SPI_OK;
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}
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int
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mrb_spi_read(mrb_spi_info *info, uint8_t *dst, size_t len, uint8_t tx_val)
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{
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spi_transaction_t t = {
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.length = len * 8,
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.tx_buffer = NULL,
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.rx_buffer = dst,
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};
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esp_err_t err = spi_device_polling_transmit(handles[info->unit_num], &t);
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return (err == ESP_OK) ? (int)len : -1;
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}
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int
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mrb_spi_write(mrb_spi_info *info, const uint8_t *src, size_t len)
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{
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spi_transaction_t t = {
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.length = len * 8,
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.tx_buffer = src,
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.rx_buffer = NULL,
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};
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esp_err_t err = spi_device_polling_transmit(handles[info->unit_num], &t);
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return (err == ESP_OK) ? (int)len : -1;
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}
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int
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mrb_spi_transfer(mrb_spi_info *info, const uint8_t *tx, uint8_t *rx, size_t len)
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{
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spi_transaction_t t = {
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.length = len * 8,
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.tx_buffer = tx,
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.rx_buffer = rx,
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};
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esp_err_t err = spi_device_polling_transmit(handles[info->unit_num], &t);
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return (err == ESP_OK) ? (int)len : -1;
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}
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@@ -0,0 +1,73 @@
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#include <string.h>
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#include "pico/stdlib.h"
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#include "hardware/spi.h"
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#include <mruby/spi.h>
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#define UNIT_SELECT(info) \
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spi_inst_t *inst; \
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switch ((info)->unit_num) { \
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case 0: inst = spi0; break; \
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case 1: inst = spi1; break; \
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default: return MRB_SPI_ERROR_UNIT; \
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}
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int
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mrb_spi_unit_name_to_num(const char *name)
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{
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if (strcmp(name, "RP2040_SPI0") == 0) return 0;
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if (strcmp(name, "RP2040_SPI1") == 0) return 1;
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return MRB_SPI_ERROR_UNIT;
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}
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mrb_spi_status
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mrb_spi_init(mrb_spi_info *info)
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{
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UNIT_SELECT(info);
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spi_init(inst, info->frequency);
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if (info->sck_pin < 0) info->sck_pin = PICO_DEFAULT_SPI_SCK_PIN;
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if (info->cipo_pin < 0) info->cipo_pin = PICO_DEFAULT_SPI_RX_PIN;
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if (info->copi_pin < 0) info->copi_pin = PICO_DEFAULT_SPI_TX_PIN;
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gpio_set_function(info->sck_pin, GPIO_FUNC_SPI);
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gpio_set_function(info->cipo_pin, GPIO_FUNC_SPI);
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gpio_set_function(info->copi_pin, GPIO_FUNC_SPI);
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if (info->first_bit != MRB_SPI_MSB_FIRST) {
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return MRB_SPI_ERROR_FIRST_BIT;
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}
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spi_cpol_t cpol;
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spi_cpha_t cpha;
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switch (info->mode) {
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case 0: cpol = 0; cpha = 0; break;
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case 1: cpol = 0; cpha = 1; break;
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case 2: cpol = 1; cpha = 0; break;
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case 3: cpol = 1; cpha = 1; break;
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default: return MRB_SPI_ERROR_MODE;
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}
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spi_set_format(inst, 8, cpol, cpha, info->first_bit);
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return MRB_SPI_OK;
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}
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int
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mrb_spi_read(mrb_spi_info *info, uint8_t *dst, size_t len, uint8_t tx_val)
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{
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UNIT_SELECT(info);
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return spi_read_blocking(inst, tx_val, dst, len);
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}
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int
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mrb_spi_write(mrb_spi_info *info, const uint8_t *src, size_t len)
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{
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UNIT_SELECT(info);
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return spi_write_blocking(inst, src, len);
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}
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int
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mrb_spi_transfer(mrb_spi_info *info, const uint8_t *tx, uint8_t *rx, size_t len)
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{
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UNIT_SELECT(info);
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return spi_write_read_blocking(inst, tx, rx, len);
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}
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@@ -0,0 +1,235 @@
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#include <string.h>
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#include <mruby.h>
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#include <mruby/presym.h>
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#include <mruby/variable.h>
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#include <mruby/string.h>
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#include <mruby/array.h>
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#include <mruby/data.h>
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#include <mruby/class.h>
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#include <mruby/spi.h>
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#define STACK_BUF_SIZE 256
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#define E_IO_ERROR mrb_exc_get_id(mrb, MRB_SYM(IOError))
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static void
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spi_info_free(mrb_state *mrb, void *ptr)
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{
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mrb_free(mrb, ptr);
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}
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static const struct mrb_data_type spi_info_type = { "SPI", spi_info_free };
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#define SPI_INFO(self) \
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((mrb_spi_info*)mrb_data_get_ptr(mrb, self, &spi_info_type))
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static size_t
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spi_calc_size(mrb_state *mrb, mrb_value *args, mrb_int argc)
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{
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size_t total = 0;
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for (mrb_int i = 0; i < argc; i++) {
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switch (mrb_type(args[i])) {
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case MRB_TT_ARRAY:
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total += RARRAY_LEN(args[i]);
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break;
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case MRB_TT_INTEGER:
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total += 1;
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break;
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case MRB_TT_STRING:
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total += RSTRING_LEN(args[i]);
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break;
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default:
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mrb_raise(mrb, E_TYPE_ERROR, "Integer, Array, or String expected");
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}
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}
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return total;
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}
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static void
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spi_fill_buf(mrb_state *mrb, uint8_t *buf, mrb_value *args, mrb_int argc,
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size_t pad)
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{
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size_t pos = 0;
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for (mrb_int i = 0; i < argc; i++) {
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switch (mrb_type(args[i])) {
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case MRB_TT_ARRAY: {
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mrb_int alen = RARRAY_LEN(args[i]);
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const mrb_value *aptr = RARRAY_PTR(args[i]);
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for (mrb_int j = 0; j < alen; j++) {
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if (!mrb_integer_p(aptr[j])) {
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mrb_raise(mrb, E_TYPE_ERROR, "array element must be Integer");
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}
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buf[pos++] = (uint8_t)mrb_integer(aptr[j]);
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}
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break;
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}
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case MRB_TT_INTEGER:
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buf[pos++] = (uint8_t)mrb_integer(args[i]);
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break;
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case MRB_TT_STRING:
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memcpy(&buf[pos], RSTRING_PTR(args[i]), RSTRING_LEN(args[i]));
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pos += RSTRING_LEN(args[i]);
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break;
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default:
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break;
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}
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}
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memset(&buf[pos], 0, pad);
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}
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/* SPI.new(unit:, frequency:, sck_pin:, cipo_pin:, copi_pin:,
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cs_pin:, mode:, first_bit:) */
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static mrb_value
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mrb_spi_s_new(mrb_state *mrb, mrb_value klass)
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{
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const char *unit_name;
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mrb_int freq = 100000, sck = -1, cipo = -1, copi = -1, cs = -1;
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mrb_int mode = 0, first_bit = MRB_SPI_MSB_FIRST;
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const mrb_sym kw_names[] = {
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MRB_SYM(unit), MRB_SYM(frequency), MRB_SYM(sck_pin),
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MRB_SYM(cipo_pin), MRB_SYM(copi_pin), MRB_SYM(cs_pin),
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MRB_SYM(mode), MRB_SYM(first_bit)
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};
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mrb_value kw_values[8];
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mrb_kwargs kwargs = { 8, 7, kw_names, kw_values, NULL };
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mrb_get_args(mrb, ":", &kwargs);
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/* unit is required */
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if (mrb_undef_p(kw_values[0])) {
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mrb_raise(mrb, E_ARGUMENT_ERROR, "unit: is required");
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}
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unit_name = mrb_str_to_cstr(mrb, mrb_sym_str(mrb, mrb_symbol(kw_values[0])));
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if (!mrb_undef_p(kw_values[1])) freq = mrb_integer(kw_values[1]);
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if (!mrb_undef_p(kw_values[2])) sck = mrb_integer(kw_values[2]);
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if (!mrb_undef_p(kw_values[3])) cipo = mrb_integer(kw_values[3]);
|
||||
if (!mrb_undef_p(kw_values[4])) copi = mrb_integer(kw_values[4]);
|
||||
if (!mrb_undef_p(kw_values[5])) cs = mrb_integer(kw_values[5]);
|
||||
if (!mrb_undef_p(kw_values[6])) mode = mrb_integer(kw_values[6]);
|
||||
if (!mrb_undef_p(kw_values[7])) first_bit = mrb_integer(kw_values[7]);
|
||||
|
||||
int num = mrb_spi_unit_name_to_num(unit_name);
|
||||
if (num < 0) {
|
||||
mrb_raisef(mrb, E_ARGUMENT_ERROR, "unknown SPI unit: %s", unit_name);
|
||||
}
|
||||
|
||||
mrb_spi_info *info = (mrb_spi_info*)mrb_malloc(mrb, sizeof(mrb_spi_info));
|
||||
info->unit_num = (uint8_t)num;
|
||||
info->frequency = (uint32_t)freq;
|
||||
info->sck_pin = (int8_t)sck;
|
||||
info->cipo_pin = (int8_t)cipo;
|
||||
info->copi_pin = (int8_t)copi;
|
||||
info->cs_pin = (int8_t)cs;
|
||||
info->mode = (uint8_t)mode;
|
||||
info->first_bit = (uint8_t)first_bit;
|
||||
|
||||
mrb_value self = mrb_obj_value(
|
||||
Data_Wrap_Struct(mrb, mrb_class_ptr(klass), &spi_info_type, info));
|
||||
|
||||
mrb_spi_status st = mrb_spi_init(info);
|
||||
if (st != MRB_SPI_OK) {
|
||||
mrb_raise(mrb, E_IO_ERROR, "SPI init failed");
|
||||
}
|
||||
return self;
|
||||
}
|
||||
|
||||
/* SPI#write(*data) */
|
||||
static mrb_value
|
||||
mrb_spi_m_write(mrb_state *mrb, mrb_value self)
|
||||
{
|
||||
mrb_value *args;
|
||||
mrb_int argc;
|
||||
mrb_get_args(mrb, "*", &args, &argc);
|
||||
|
||||
mrb_spi_info *info = SPI_INFO(self);
|
||||
size_t total = spi_calc_size(mrb, args, argc);
|
||||
if (total == 0) return mrb_fixnum_value(0);
|
||||
|
||||
uint8_t sbuf[STACK_BUF_SIZE];
|
||||
uint8_t *buf = sbuf;
|
||||
mrb_bool need_free = FALSE;
|
||||
if (total > STACK_BUF_SIZE) {
|
||||
buf = (uint8_t*)mrb_malloc(mrb, total);
|
||||
need_free = TRUE;
|
||||
}
|
||||
spi_fill_buf(mrb, buf, args, argc, 0);
|
||||
|
||||
int ret = mrb_spi_write(info, buf, total);
|
||||
if (need_free) mrb_free(mrb, buf);
|
||||
if (ret < 0) mrb_raise(mrb, E_IO_ERROR, "SPI write failed");
|
||||
return mrb_fixnum_value(ret);
|
||||
}
|
||||
|
||||
/* SPI#read(len, tx_value=0) */
|
||||
static mrb_value
|
||||
mrb_spi_m_read(mrb_state *mrb, mrb_value self)
|
||||
{
|
||||
mrb_int len, tx_val = 0;
|
||||
mrb_get_args(mrb, "i|i", &len, &tx_val);
|
||||
if (len <= 0) mrb_raise(mrb, E_ARGUMENT_ERROR, "length must be positive");
|
||||
|
||||
mrb_spi_info *info = SPI_INFO(self);
|
||||
uint8_t *buf = (uint8_t*)mrb_malloc(mrb, len);
|
||||
int ret = mrb_spi_read(info, buf, (size_t)len, (uint8_t)tx_val);
|
||||
if (ret < 0) {
|
||||
mrb_free(mrb, buf);
|
||||
mrb_raise(mrb, E_IO_ERROR, "SPI read failed");
|
||||
}
|
||||
mrb_value str = mrb_str_new(mrb, (const char*)buf, ret);
|
||||
mrb_free(mrb, buf);
|
||||
return str;
|
||||
}
|
||||
|
||||
/* SPI#transfer(*data, additional_read_bytes: 0) */
|
||||
static mrb_value
|
||||
mrb_spi_m_transfer(mrb_state *mrb, mrb_value self)
|
||||
{
|
||||
mrb_value *args;
|
||||
mrb_int argc, extra = 0;
|
||||
const mrb_sym kw_names[] = { MRB_SYM(additional_read_bytes) };
|
||||
mrb_value kw_values[1];
|
||||
mrb_kwargs kwargs = { 1, 0, kw_names, kw_values, NULL };
|
||||
mrb_get_args(mrb, "*:", &args, &argc, &kwargs);
|
||||
|
||||
if (!mrb_undef_p(kw_values[0])) extra = mrb_integer(kw_values[0]);
|
||||
|
||||
mrb_spi_info *info = SPI_INFO(self);
|
||||
size_t total = spi_calc_size(mrb, args, argc) + (size_t)extra;
|
||||
if (total == 0) return mrb_str_new(mrb, "", 0);
|
||||
|
||||
uint8_t sbuf_tx[STACK_BUF_SIZE], sbuf_rx[STACK_BUF_SIZE];
|
||||
uint8_t *tx = sbuf_tx, *rx = sbuf_rx;
|
||||
mrb_bool need_free = FALSE;
|
||||
if (total > STACK_BUF_SIZE) {
|
||||
tx = (uint8_t*)mrb_malloc(mrb, total * 2);
|
||||
rx = tx + total;
|
||||
need_free = TRUE;
|
||||
}
|
||||
spi_fill_buf(mrb, tx, args, argc, (size_t)extra);
|
||||
|
||||
int ret = mrb_spi_transfer(info, tx, rx, total);
|
||||
if (ret < 0) {
|
||||
if (need_free) mrb_free(mrb, tx);
|
||||
mrb_raise(mrb, E_IO_ERROR, "SPI transfer failed");
|
||||
}
|
||||
mrb_value str = mrb_str_new(mrb, (const char*)rx, ret);
|
||||
if (need_free) mrb_free(mrb, tx);
|
||||
return str;
|
||||
}
|
||||
|
||||
void
|
||||
mrb_hw_spi_gem_init(mrb_state *mrb)
|
||||
{
|
||||
struct RClass *cls = mrb_define_class_id(mrb, MRB_SYM(SPI), mrb->object_class);
|
||||
MRB_SET_INSTANCE_TT(cls, MRB_TT_CDATA);
|
||||
|
||||
mrb_define_class_method_id(mrb, cls, MRB_SYM(new), mrb_spi_s_new, MRB_ARGS_KEY(8, 1));
|
||||
mrb_define_method_id(mrb, cls, MRB_SYM(write), mrb_spi_m_write, MRB_ARGS_REST());
|
||||
mrb_define_method_id(mrb, cls, MRB_SYM(read), mrb_spi_m_read, MRB_ARGS_ARG(1, 1));
|
||||
mrb_define_method_id(mrb, cls, MRB_SYM(transfer), mrb_spi_m_transfer, MRB_ARGS_REST()|MRB_ARGS_KEY(1, 0));
|
||||
}
|
||||
|
||||
void
|
||||
mrb_hw_spi_gem_final(mrb_state *mrb)
|
||||
{
|
||||
}
|
||||
Reference in New Issue
Block a user