mirror of
https://github.com/revng/revng
synced 2026-06-21 14:07:57 +00:00
Merge branch 'feature/fix-exit-ssa'
This commit is contained in:
Pietro Fezzardi
@@ -22,6 +22,7 @@
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Instruction.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/ModuleSlotTracker.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/Casting.h"
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@@ -53,38 +54,119 @@ struct IncomingInfo {
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};
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static bool haveIncompatibleIncomings(const std::set<IncomingInfo> &LHS,
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const std::set<IncomingInfo> &RHS) {
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const std::set<IncomingInfo> &RHS,
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llvm::ModuleSlotTracker &MST) {
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if (Log.isEnabled()) {
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{
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revng_log(Log, "LHS: {");
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for (const auto &[PHIBlock, IncomingBlock, IncomingValue] : LHS) {
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LoggerIndent LHSIndent{ Log };
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revng_log(Log, "{");
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{
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LoggerIndent MoreIndent{ Log };
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revng_log(Log, "PHIBlock: " << PHIBlock->getName());
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revng_log(Log, "IncomingBlock: " << IncomingBlock->getName());
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revng_log(Log, "IncomingValue: " << dumpToString(IncomingValue, MST));
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}
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revng_log(Log, "}");
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}
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revng_log(Log, "}");
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}
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{
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revng_log(Log, "RHS: {");
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for (const auto &[PHIBlock, IncomingBlock, IncomingValue] : RHS) {
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LoggerIndent LHSIndent{ Log };
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revng_log(Log, "{");
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{
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LoggerIndent MoreIndent{ Log };
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revng_log(Log, "PHIBlock: " << PHIBlock->getName());
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revng_log(Log, "IncomingBlock: " << IncomingBlock->getName());
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revng_log(Log, "IncomingValue: " << dumpToString(IncomingValue, MST));
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}
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revng_log(Log, "}");
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}
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revng_log(Log, "}");
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}
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}
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revng_log(Log, "Evaluating incompatibility");
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for (const auto &[PHIBlock, IncomingBlock, IncomingValue] : LHS) {
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LoggerIndent IndentIncompatibilityCheck{ Log };
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{
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revng_log(Log, "LHS: {");
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{
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LoggerIndent MoreIndent{ Log };
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revng_log(Log, "PHIBlock: " << PHIBlock->getName());
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revng_log(Log, "IncomingBlock: " << IncomingBlock->getName());
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revng_log(Log, "IncomingValue: " << dumpToString(IncomingValue, MST));
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}
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revng_log(Log, "}");
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}
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auto It = RHS.lower_bound(IncomingInfo{ PHIBlock, IncomingBlock, nullptr });
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auto End = RHS.upper_bound(IncomingInfo{
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PHIBlock, IncomingBlock, std::numeric_limits<Value *>::max() });
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PHIBlock,
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IncomingBlock,
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(Value *) std::numeric_limits<intptr_t>::max() });
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// If RHS contains a PHI that is in the same block as PHIBlock, and has a
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// different incoming value on the same incoming block, the two are
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// incompatible, because they would assign two different values to the same
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// local variable along the same edge.
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if (It != End and IncomingValue != It->IncomingValue)
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return false;
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while (It != End) {
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revng_log(Log, "RHS: {");
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{
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LoggerIndent MoreIndent{ Log };
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revng_log(Log, "It->PHIBlock: " << It->PHIBlock->getName());
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revng_log(Log, "It->IncomingBlock: " << It->IncomingBlock->getName());
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revng_log(Log,
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"It->IncomingValue: " << dumpToString(It->IncomingValue,
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MST));
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}
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revng_log(Log, "}");
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if (IncomingValue != It->IncomingValue) {
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revng_log(Log, "conflicting!");
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return true;
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}
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++It;
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}
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}
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return true;
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return false;
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}
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static std::vector<SetVector<PHINode *>> getPHIEquivalenceClasses(Function &F) {
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llvm::ModuleSlotTracker MST(F.getParent(),
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/* ShouldInitializeAllMetadata = */ false);
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if (Log.isEnabled()) {
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MST.incorporateFunction(F);
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F.viewCFG();
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}
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revng_log(Log, "getPHIEquivalenceClasses for Function: " << F.getName());
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LoggerIndent Indent{ Log };
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// PHINodes in the same class are mapped onto the same local variable.
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llvm::EquivalenceClasses<PHINode *> PHISameVariableClasses;
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std::unordered_map<PHINode *, std::set<IncomingInfo>> PerClassIncomings;
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const auto InitVariableClass = [&PHISameVariableClasses,
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&PerClassIncomings](PHINode *PHI) {
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if (PHISameVariableClasses.findValue(PHI) != PHISameVariableClasses.end())
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&PerClassIncomings,
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&MST](PHINode *PHI) {
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revng_log(Log, "InitVariableClass for PHI: " << dumpToString(PHI, MST));
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LoggerIndent InitIndent{ Log };
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if (PHISameVariableClasses.findValue(PHI) != PHISameVariableClasses.end()) {
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revng_log(Log, "found");
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return;
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}
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PHISameVariableClasses.insert(PHI);
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revng_log(Log, "new");
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auto &CurrentIncomingInfo = PerClassIncomings[PHI];
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unsigned NumIncomings = PHI->getNumIncomingValues();
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BasicBlock *PHIBlock = PHI->getParent();
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revng_log(Log, "NumIncomings: " << NumIncomings);
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LoggerIndent IncomingIndent{ Log };
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for (unsigned I = 0U; I < NumIncomings; ++I) {
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Value *IncomingValue = PHI->getIncomingValue(I);
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BasicBlock *IncomingBlock = PHI->getIncomingBlock(I);
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@@ -92,22 +174,30 @@ static std::vector<SetVector<PHINode *>> getPHIEquivalenceClasses(Function &F) {
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IncomingBlock,
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IncomingValue };
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CurrentIncomingInfo.insert(std::move(NewIncomingInfo));
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revng_log(Log, "I = " << I << ": " << dumpToString(IncomingValue, MST));
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}
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return;
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};
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for (BasicBlock *BB : llvm::ReversePostOrderTraversal(&F)) {
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LoggerIndent PHIIndent{ Log };
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for (auto &PHI : BB->phis()) {
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revng_log(Log, "From PHI: " << dumpToString(PHI, MST));
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// Set up an equivalence class for PHI, if necessary
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InitVariableClass(&PHI);
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// Then, for each user, if it's a PHINode, try to see if we can insert it
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// in the same equivalence class as PHI.
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LoggerIndent UserIndent{ Log };
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for (User *U : PHI.users()) {
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revng_log(Log, "PHIUser: " << dumpToString(U, MST));
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LoggerIndent MoreUserIndent{ Log };
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auto *PHIUser = dyn_cast<PHINode>(U);
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if (not PHIUser or PHIUser == &PHI)
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if (not PHIUser or PHIUser == &PHI) {
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revng_log(Log, "not a PHINode");
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continue;
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}
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// Set up an equivalence class for PHIUser, if necessary.
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// Sometimes this might not be necessary, because we might have already
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@@ -119,14 +209,11 @@ static std::vector<SetVector<PHINode *>> getPHIEquivalenceClasses(Function &F) {
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// If PHI and PHIUser are already in the same equivalence class, there's
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// nothing to do.
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if (PHISameVariableClasses.isEquivalent(&PHI, PHIUser))
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continue;
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// If the PHI has a user that is not another PHI, it cannot be put in
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// the same equivalence class as the PHIUser, so we bail out.
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if (llvm::any_of(PHI.users(),
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[](const User *U) { return not isa<PHINode>(U); }))
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if (PHISameVariableClasses.isEquivalent(&PHI, PHIUser)) {
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revng_log(Log, "PHI and PHIUser are equivalent");
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continue;
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}
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revng_log(Log, "PHI and PHIUser are NOT equivalent");
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PHINode *PHILeader = PHISameVariableClasses.getLeaderValue(&PHI);
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PHINode *UserLeader = PHISameVariableClasses.getLeaderValue(PHIUser);
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@@ -141,8 +228,12 @@ static std::vector<SetVector<PHINode *>> getPHIEquivalenceClasses(Function &F) {
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// hold different values that must be kept alive at the same time,
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// otherwise we'll lose one of them. In this case we have to bail out.
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if (haveIncompatibleIncomings(PHIIncomingInfo->second,
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UserIncomingInfo->second))
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UserIncomingInfo->second,
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MST)) {
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revng_log(Log, "PHI and PHIUser haveIncompatibleIncomings");
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continue;
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}
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revng_log(Log, "PHI and PHIUser DON'T haveIncompatibleIncomings");
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// Here the two are compatible so we join the equivalence classes.
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PHISameVariableClasses.unionSets(&PHI, PHIUser);
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@@ -186,6 +277,21 @@ static std::vector<SetVector<PHINode *>> getPHIEquivalenceClasses(Function &F) {
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}
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}
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if (Log.isEnabled()) {
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revng_log(Log, "Result (size " << Result.size() << ") = {");
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size_t I = 0;
|
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for (const auto &Class : Result) {
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LoggerIndent IndentResult{ Log };
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revng_log(Log, "Class (size " << Class.size() << "): {" << I++);
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for (const PHINode *PHI : Class) {
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LoggerIndent IndentClass{ Log };
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revng_log(Log, dumpToString(PHI, MST));
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}
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revng_log(Log, "};");
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}
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revng_log(Log, "};");
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}
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return Result;
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||||
}
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@@ -433,11 +539,11 @@ static void replacePHIEquivalenceClass(const SetVector<PHINode *> &PHIs,
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for (Use &U : llvm::make_early_inc_range(PHI->uses())) {
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revng_log(Log, "in User: " << dumpToString(U.getUser()));
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Value *NewOperand = nullptr;
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if (isa<PHINode>(U.getUser()))
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Value *NewOperand = NewLoad;
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if (auto *PHIUser = dyn_cast<PHINode>(U.getUser());
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PHIUser and PHIs.contains(PHIUser)) {
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NewOperand = UndefValue::get(PHI->getType());
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else
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NewOperand = NewLoad;
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}
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revng_log(Log, "replaced with: " << dumpToString(NewOperand));
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U.set(NewOperand);
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}
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@@ -401,6 +401,7 @@ set(FILECHECK_TESTS
|
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llvm-passes/detect-uninlinable-helpers.ll
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llvm-passes/enforce-single-exit.ll
|
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llvm-passes/example.ll
|
||||
llvm-passes/exit-ssa.ll
|
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llvm-passes/generic-region-info.ll
|
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llvm-passes/inline-divergent-scopes-and-materialize-trivial-goto.ll
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llvm-passes/inline-divergent-scopes.ll
|
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|
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@@ -0,0 +1,357 @@
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;
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; This file is distributed under the MIT License. See LICENSE.md for details.
|
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;
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||||
|
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; RUN: %root/bin/revng opt %s -exit-ssa -S -o - | FileCheck %s
|
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;
|
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; CHECK-LABEL: define i32 @double_swap(i32 %a, i32 %b)
|
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;
|
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define i32 @double_swap(i32 %a, i32 %b) {
|
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; CHECK: entry:
|
||||
entry:
|
||||
; CHECK: [[ALLOCA0:%[a-zA-Z0-9_]+]] = alloca i32
|
||||
; CHECK: [[ALLOCA1:%[a-zA-Z0-9_]+]] = alloca i32
|
||||
; CHECK: store i32 %b, ptr [[ALLOCA0]]
|
||||
; CHECK: store i32 %a, ptr [[ALLOCA1]]
|
||||
; CHECK: br
|
||||
br label %while.cond
|
||||
|
||||
; CHECK: while.cond:
|
||||
while.cond:
|
||||
; CHECK: [[LOAD1:%[a-zA-Z0-9_]+]] = load i32, ptr [[ALLOCA1]]
|
||||
; CHECK: [[LOAD0:%[a-zA-Z0-9_]+]] = load i32, ptr [[ALLOCA0]]
|
||||
; CHECK: store i32 [[LOAD0]], ptr [[ALLOCA1]]
|
||||
; CHECK: store i32 [[LOAD1]], ptr [[ALLOCA0]]
|
||||
%b.addr.0 = phi i32 [ %b, %entry ], [ %a.addr.0, %while.cond ]
|
||||
%a.addr.0 = phi i32 [ %a, %entry ], [ %b.addr.0, %while.cond ]
|
||||
br i1 undef, label %while.end, label %while.cond
|
||||
; CHECK: br
|
||||
|
||||
; CHECK: while.end:
|
||||
while.end:
|
||||
; CHECK: sub i32 [[LOAD1]], [[LOAD0]]
|
||||
%sub = sub i32 %a.addr.0, %b.addr.0
|
||||
ret i32 %sub
|
||||
}
|
||||
|
||||
;
|
||||
; CHECK-LABEL: define i32 @lost_copy(i32 %a)
|
||||
;
|
||||
define i32 @lost_copy(i32 %a) {
|
||||
; CHECK: entry:
|
||||
entry:
|
||||
; CHECK: [[ALLOCA:%[a-zA-Z0-9_]+]] = alloca i32
|
||||
; CHECK-NOT: alloca
|
||||
; CHECK: store i32 %a, ptr [[ALLOCA]]
|
||||
br label %while.cond
|
||||
; CHECK: br
|
||||
|
||||
; CHECK: while.cond:
|
||||
while.cond:
|
||||
; CHECK: [[LOAD:%[a-zA-Z0-9_]+]] = load i32, ptr [[ALLOCA]]
|
||||
; CHECK: [[ADD:%[a-zA-Z0-9_]+]] = add i32 [[LOAD]], 1
|
||||
; CHECK: store i32 [[ADD]], ptr [[ALLOCA]]
|
||||
%b = phi i32 [ %a, %entry ], [ %c, %while.cond ]
|
||||
%c = add i32 %b, 1
|
||||
br i1 undef, label %while.end, label %while.cond
|
||||
; CHECK: br
|
||||
|
||||
; CHECK: while.end:
|
||||
while.end:
|
||||
; CHECK: ret i32 [[LOAD]]
|
||||
ret i32 %b
|
||||
}
|
||||
|
||||
;
|
||||
; CHECK-LABEL: define i32 @chain(i32 %a, i32 %b, i32 %c)
|
||||
;
|
||||
; Two distinct PHINodes where the first (%p1) is an incoming of the second
|
||||
; (%p2), and both also have non-PHI users (%u1 and %u2). They are collapsed
|
||||
; onto the same alloca.
|
||||
define i32 @chain(i32 %a, i32 %b, i32 %c) {
|
||||
; CHECK: entry:
|
||||
entry:
|
||||
; CHECK: [[ALLOCA:%[a-zA-Z0-9_]+]] = alloca i32
|
||||
; CHECK-NOT: alloca
|
||||
br i1 undef, label %A, label %B
|
||||
|
||||
; CHECK: A:
|
||||
A:
|
||||
; CHECK: store i32 %a, ptr [[ALLOCA]]
|
||||
br label %M1
|
||||
|
||||
; CHECK: B:
|
||||
B:
|
||||
; CHECK: store i32 %b, ptr [[ALLOCA]]
|
||||
br label %M1
|
||||
|
||||
; CHECK: M1:
|
||||
M1:
|
||||
; CHECK: [[LOAD1:%[a-zA-Z0-9_]+]] = load i32, ptr [[ALLOCA]]
|
||||
; CHECK: add i32 [[LOAD1]], 1
|
||||
%p1 = phi i32 [ %a, %A ], [ %b, %B ]
|
||||
%u1 = add i32 %p1, 1
|
||||
br i1 undef, label %C, label %M2
|
||||
|
||||
; CHECK: C:
|
||||
C:
|
||||
; CHECK: store i32 %c, ptr [[ALLOCA]]
|
||||
br label %M2
|
||||
|
||||
; CHECK: M2:
|
||||
M2:
|
||||
; CHECK: [[LOAD2:%[a-zA-Z0-9_]+]] = load i32, ptr [[ALLOCA]]
|
||||
; CHECK: add i32 [[LOAD2]], 2
|
||||
%p2 = phi i32 [ %p1, %M1 ], [ %c, %C ]
|
||||
%u2 = add i32 %p2, 2
|
||||
%r = add i32 %u1, %u2
|
||||
ret i32 %r
|
||||
}
|
||||
|
||||
;
|
||||
; CHECK-LABEL: define i32 @cone(i32 %a, i32 %b, i32 %c, i32 %d)
|
||||
;
|
||||
; A cone (DAG) of PHINodes coming from a nested if-else: %p1 and %p2 are both
|
||||
; incomings of %pt. The whole cone is collapsed onto a single alloca, with no
|
||||
; edge splitting (each incoming block contributes a single value).
|
||||
define i32 @cone(i32 %a, i32 %b, i32 %c, i32 %d) {
|
||||
; CHECK: entry:
|
||||
entry:
|
||||
; CHECK: [[ALLOCA:%[a-zA-Z0-9_]+]] = alloca i32
|
||||
; CHECK-NOT: alloca
|
||||
br i1 undef, label %if1, label %else1
|
||||
|
||||
; CHECK: if1:
|
||||
if1:
|
||||
; CHECK: store i32 %a, ptr [[ALLOCA]]
|
||||
br i1 undef, label %m1, label %f1
|
||||
|
||||
; CHECK: f1:
|
||||
f1:
|
||||
; CHECK: store i32 %b, ptr [[ALLOCA]]
|
||||
br label %m1
|
||||
|
||||
m1:
|
||||
%p1 = phi i32 [ %a, %if1 ], [ %b, %f1 ]
|
||||
br label %exit
|
||||
|
||||
; CHECK: else1:
|
||||
else1:
|
||||
; CHECK: store i32 %c, ptr [[ALLOCA]]
|
||||
br i1 undef, label %m2, label %f2
|
||||
|
||||
; CHECK: f2:
|
||||
f2:
|
||||
; CHECK: store i32 %d, ptr [[ALLOCA]]
|
||||
br label %m2
|
||||
|
||||
m2:
|
||||
%p2 = phi i32 [ %c, %else1 ], [ %d, %f2 ]
|
||||
br label %exit
|
||||
|
||||
; CHECK: exit:
|
||||
exit:
|
||||
; CHECK: load i32, ptr [[ALLOCA]]
|
||||
%pt = phi i32 [ %p1, %m1 ], [ %p2, %m2 ]
|
||||
%u = add i32 %pt, 0
|
||||
ret i32 %u
|
||||
}
|
||||
|
||||
;
|
||||
; CHECK-LABEL: define i32 @edgesplit(i32 %a, i32 %b, i32 %c, i1 %t)
|
||||
;
|
||||
; %p1 and %p2 belong to the same equivalence class, but from the same incoming
|
||||
; block (%B1) they receive different values (%a for %p1, %b for %p2). Only one
|
||||
; store can live in %B1, so the edges towards the other PHIs are split into new
|
||||
; blocks where the remaining stores are emitted.
|
||||
define i32 @edgesplit(i32 %a, i32 %b, i32 %c, i1 %t) {
|
||||
; CHECK: entry:
|
||||
entry:
|
||||
; CHECK: [[ALLOCA:%[a-zA-Z0-9_]+]] = alloca i32
|
||||
br i1 undef, label %B1, label %B2
|
||||
|
||||
; CHECK: B1:
|
||||
B1:
|
||||
; CHECK: store i32 %a, ptr [[ALLOCA]]
|
||||
; CHECK: br i1 %t, label %J1, label %B1-to-J2
|
||||
br i1 %t, label %J1, label %J2
|
||||
|
||||
; CHECK: B2:
|
||||
B2:
|
||||
; CHECK: store i32 %b, ptr [[ALLOCA]]
|
||||
; CHECK: br i1 %t, label %J1, label %B2-to-J2
|
||||
br i1 %t, label %J1, label %J2
|
||||
|
||||
J1:
|
||||
%p1 = phi i32 [ %a, %B1 ], [ %b, %B2 ]
|
||||
br label %exit
|
||||
|
||||
J2:
|
||||
%p2 = phi i32 [ %b, %B1 ], [ %c, %B2 ]
|
||||
br label %exit
|
||||
|
||||
; CHECK: exit:
|
||||
exit:
|
||||
; CHECK: load i32, ptr [[ALLOCA]]
|
||||
%pt = phi i32 [ %p1, %J1 ], [ %p2, %J2 ]
|
||||
%u = add i32 %pt, 0
|
||||
ret i32 %u
|
||||
; The remaining stores live in the freshly split edge blocks.
|
||||
; CHECK: B1-to-J2:
|
||||
; CHECK: store i32 %b, ptr [[ALLOCA]]
|
||||
; CHECK: br label %J2
|
||||
; CHECK: B2-to-J2:
|
||||
; CHECK: store i32 %c, ptr [[ALLOCA]]
|
||||
; CHECK: br label %J2
|
||||
}
|
||||
|
||||
;
|
||||
; CHECK-LABEL: define i32 @conflicting(i32 %a1, i32 %a2, i32 %x, i32 %y)
|
||||
;
|
||||
; %a is an incoming of both %b and %c, but from different predecessors (%P1 for
|
||||
; %b, %P2 for %c). %b and %c hold conflicting values, so %a, %b and %c cannot be
|
||||
; merged into a single class: two allocas are needed.
|
||||
define i32 @conflicting(i32 %a1, i32 %a2, i32 %x, i32 %y) {
|
||||
; CHECK: entry:
|
||||
entry:
|
||||
; CHECK: [[ALLOCA0:%[a-zA-Z0-9_]+]] = alloca i32
|
||||
; CHECK: [[ALLOCA1:%[a-zA-Z0-9_]+]] = alloca i32
|
||||
; CHECK-NOT: alloca
|
||||
br i1 undef, label %e1, label %e2
|
||||
|
||||
; CHECK: e1:
|
||||
e1:
|
||||
; CHECK: store i32 %a1, ptr [[ALLOCA1]]
|
||||
br label %B1
|
||||
|
||||
; CHECK: e2:
|
||||
e2:
|
||||
; CHECK: store i32 %a2, ptr [[ALLOCA1]]
|
||||
br label %B1
|
||||
|
||||
; CHECK: B1:
|
||||
B1:
|
||||
; CHECK: [[PHIA:%[a-zA-Z0-9_]+]] = load i32, ptr [[ALLOCA1]]
|
||||
%a = phi i32 [ %a1, %e1 ], [ %a2, %e2 ]
|
||||
br i1 undef, label %P1, label %P2
|
||||
|
||||
; CHECK: P1:
|
||||
P1:
|
||||
; CHECK: store i32 [[PHIA]], ptr [[ALLOCA0]]
|
||||
; CHECK: store i32 %y, ptr [[ALLOCA1]]
|
||||
br label %B2
|
||||
|
||||
; CHECK: P2:
|
||||
P2:
|
||||
; CHECK: store i32 %x, ptr [[ALLOCA0]]
|
||||
br label %B2
|
||||
|
||||
; CHECK: B2:
|
||||
B2:
|
||||
; The two PHINodes live in two distinct allocas.
|
||||
; CHECK-DAG: load i32, ptr [[ALLOCA0]]
|
||||
; CHECK-DAG: load i32, ptr [[ALLOCA1]]
|
||||
%b = phi i32 [ %a, %P1 ], [ %x, %P2 ]
|
||||
%c = phi i32 [ %y, %P1 ], [ %a, %P2 ]
|
||||
%r = add i32 %b, %c
|
||||
ret i32 %r
|
||||
}
|
||||
|
||||
;
|
||||
; CHECK-LABEL: define i32 @conflicting_2(i32 %a1, i32 %a2, i32 %x, i32 %x2)
|
||||
;
|
||||
; Like conflicting, but %a is an incoming of both %b and %c from the same predecessor
|
||||
; (%P1). We still need two allocas, because %b and %c receive conflicting values
|
||||
; (%x and %x2) from the other predecessor (%P2).
|
||||
define i32 @conflicting_2(i32 %a1, i32 %a2, i32 %x, i32 %x2) {
|
||||
; CHECK: entry:
|
||||
entry:
|
||||
; CHECK: [[ALLOCA0:%[a-zA-Z0-9_]+]] = alloca i32
|
||||
; CHECK: [[ALLOCA1:%[a-zA-Z0-9_]+]] = alloca i32
|
||||
; CHECK-NOT: alloca
|
||||
br i1 undef, label %e1, label %e2
|
||||
|
||||
; CHECK: e1:
|
||||
e1:
|
||||
; CHECK: store i32 %a1, ptr [[ALLOCA1]]
|
||||
br label %B1
|
||||
|
||||
; CHECK: e2:
|
||||
e2:
|
||||
; CHECK: store i32 %a2, ptr [[ALLOCA1]]
|
||||
br label %B1
|
||||
|
||||
B1:
|
||||
; CHECK: [[PHIA:%[a-zA-Z0-9_]+]] = load i32, ptr [[ALLOCA1]]
|
||||
%a = phi i32 [ %a1, %e1 ], [ %a2, %e2 ]
|
||||
br i1 undef, label %P1, label %P2
|
||||
|
||||
; CHECK: P1:
|
||||
P1:
|
||||
; CHECK: store i32 [[PHIA]], ptr [[ALLOCA0]]
|
||||
br label %B2
|
||||
|
||||
; CHECK: P2:
|
||||
P2:
|
||||
; CHECK: store i32 %x, ptr [[ALLOCA0]]
|
||||
; CHECK: store i32 %x2, ptr [[ALLOCA1]]
|
||||
br label %B2
|
||||
|
||||
; CHECK: B2:
|
||||
B2:
|
||||
; The two PHINodes live in two distinct allocas.
|
||||
; CHECK-DAG: load i32, ptr [[ALLOCA0]]
|
||||
; CHECK-DAG: load i32, ptr [[ALLOCA1]]
|
||||
%b = phi i32 [ %a, %P1 ], [ %x, %P2 ]
|
||||
%c = phi i32 [ %a, %P1 ], [ %x2, %P2 ]
|
||||
%r = add i32 %b, %c
|
||||
ret i32 %r
|
||||
}
|
||||
|
||||
;
|
||||
; CHECK-LABEL: define i32 @non_conflicting(i32 %a1, i32 %a2, i32 %x)
|
||||
;
|
||||
; Like conflicting_2, but %b and %c receive the same values from every predecessor, so
|
||||
; %a, %b and %c can all be grouped together and a single alloca is enough.
|
||||
define i32 @non_conflicting(i32 %a1, i32 %a2, i32 %x) {
|
||||
; CHECK: entry:
|
||||
entry:
|
||||
; CHECK: [[ALLOCA:%[a-zA-Z0-9_]+]] = alloca i32
|
||||
; CHECK-NOT: alloca
|
||||
br i1 undef, label %e1, label %e2
|
||||
|
||||
; CHECK: e1:
|
||||
e1:
|
||||
; CHECK: store i32 %a1, ptr [[ALLOCA]]
|
||||
br label %B1
|
||||
|
||||
; CHECK: e2:
|
||||
e2:
|
||||
; CHECK: store i32 %a2, ptr [[ALLOCA]]
|
||||
br label %B1
|
||||
|
||||
B1:
|
||||
%a = phi i32 [ %a1, %e1 ], [ %a2, %e2 ]
|
||||
br i1 undef, label %P1, label %P2
|
||||
|
||||
; CHECK: P1:
|
||||
P1:
|
||||
; CHECK-NOT: store
|
||||
br label %B2
|
||||
|
||||
; CHECK: P2:
|
||||
P2:
|
||||
; CHECK: store i32 %x, ptr [[ALLOCA]]
|
||||
br label %B2
|
||||
|
||||
; CHECK: B2:
|
||||
B2:
|
||||
; Both PHINodes share the same, single alloca.
|
||||
; CHECK: load i32, ptr [[ALLOCA]]
|
||||
; CHECK: load i32, ptr [[ALLOCA]]
|
||||
%b = phi i32 [ %a, %P1 ], [ %x, %P2 ]
|
||||
%c = phi i32 [ %a, %P1 ], [ %x, %P2 ]
|
||||
%r = add i32 %b, %c
|
||||
ret i32 %r
|
||||
}
|
||||
Reference in New Issue
Block a user