mirror of
https://github.com/revng/revng
synced 2026-06-21 14:07:57 +00:00
Ivan Krysak
101 lines
1.9 KiB
YAML
101 lines
1.9 KiB
YAML
#
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# This file is distributed under the MIT License. See LICENSE.md for details.
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#
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ABI: AAPCS64
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ArgumentsArePositionBased: false
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OnlyStartDoubleArgumentsFromAnEvenRegister: true
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ArgumentsCanBeSplitBetweenRegistersAndStack: true
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BigArgumentsUsePointersToCopy: true
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NoRegisterArgumentsCanComeAfterStackOnes: false
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AllowPackedTypesInRegisters: true
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CalleeIsResponsibleForStackCleanup: false
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FloatsUseGPRs: false
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PackStackArguments: false
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TreatAllAggregatesAsPacked: false
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StackAlignment: 16
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MinimumStackArgumentSize: 8
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MaximumGPRsPerAggregateArgument: 2
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MaximumGPRsPerAggregateReturnValue: 2
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MaximumGPRsPerScalarArgument: 2
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MaximumGPRsPerScalarReturnValue: 2
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GeneralPurposeArgumentRegisters:
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- x0_aarch64
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- x1_aarch64
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- x2_aarch64
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- x3_aarch64
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- x4_aarch64
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- x5_aarch64
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- x6_aarch64
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- x7_aarch64
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# This lists all the registers allowed for use by the spec, BUT note that I have
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# never run into a case where more than the first two registers are involved.
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GeneralPurposeReturnValueRegisters:
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- x0_aarch64
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- x1_aarch64
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- x2_aarch64
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- x3_aarch64
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- x4_aarch64
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- x5_aarch64
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- x6_aarch64
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- x7_aarch64
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VectorArgumentRegisters:
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- v0_aarch64
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- v1_aarch64
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- v2_aarch64
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- v3_aarch64
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- v4_aarch64
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- v5_aarch64
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- v6_aarch64
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- v7_aarch64
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VectorReturnValueRegisters:
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- v0_aarch64
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- v1_aarch64
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- v2_aarch64
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- v3_aarch64
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- v4_aarch64
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- v5_aarch64
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- v6_aarch64
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- v7_aarch64
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CalleeSavedRegisters:
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- x19_aarch64
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- x20_aarch64
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- x21_aarch64
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- x22_aarch64
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- x23_aarch64
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- x24_aarch64
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- x25_aarch64
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- x26_aarch64
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- x27_aarch64
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- x28_aarch64
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- x29_aarch64
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- v8_aarch64
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- v9_aarch64
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- v10_aarch64
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- v11_aarch64
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- v12_aarch64
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- v13_aarch64
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- v14_aarch64
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- v15_aarch64
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ReturnValueLocationRegister: x8_aarch64
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ReturnValueLocationIsReturned: false
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ScalarTypes:
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- Size: 1
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- Size: 2
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- Size: 4
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- Size: 8
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- Size: 16
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FloatingPointScalarTypes:
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- Size: 2
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- Size: 4
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- Size: 8
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- Size: 16
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