mirror of
https://github.com/cea-sec/miasm
synced 2026-06-21 13:48:18 +00:00
Fabrice Desclaux
6e09df71a3
Fat patch here: some API have changed. Each irbloc now affects a special "IRDst" register which is used to describe the destination irbloc. It allows simple description of architectures using delay slots. Architectures semantic and tcc/python jitter are modified in consequence. LLVM jitter is disabled for now, but should be patch soon.
27 lines
656 B
Python
27 lines
656 B
Python
from miasm2.arch.x86.arch import mn_x86
|
|
from miasm2.expression.expression import get_rw
|
|
from miasm2.arch.x86.ira import ir_a_x86_32
|
|
print """
|
|
Simple expression manipulation demo.
|
|
Get read/written registers for a given instruction
|
|
"""
|
|
|
|
arch = mn_x86
|
|
ir_arch = ir_a_x86_32()
|
|
|
|
l = arch.fromstring('LODSB', 32)
|
|
l.offset, l.l = 0, 15
|
|
ir_arch.add_instr(l)
|
|
|
|
print '*' * 80
|
|
for lbl, b in ir_arch.blocs.items():
|
|
print b
|
|
for irs in b.irs:
|
|
o_r, o_w = get_rw(irs)
|
|
print 'read: ', [str(x) for x in o_r]
|
|
print 'written:', [str(x) for x in o_w]
|
|
print
|
|
ir_arch.gen_graph()
|
|
g = ir_arch.graph()
|
|
open('graph_instr.txt', 'w').write(g)
|