662 Commits

Author SHA1 Message Date
BrentHoltsclaw ce5143e602 Update to version 1.4.0
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
1.4.0
2019-08-19 18:39:20 -07:00
BrentHoltsclaw 1d7fc4efe4 Filehelper use python2/3 compatable features
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-08-19 13:15:30 -07:00
BrentHoltsclaw d310fe3b34 Added build notes based upon compilation feedback
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-08-19 13:06:47 -07:00
BrentHoltsclaw 2ee6b6a1e7 Fixup windriver hypercall typecasting
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-08-19 13:06:47 -07:00
Frinzell bc5b63cea8 Added additional SKU support 2019-08-19 13:06:18 -07:00
BrentHoltsclaw 6fccb31877 Fixup spd_wd to work with python3
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-08-16 14:19:26 -07:00
BrentHoltsclaw 73485556d7 Cleanup bugs - Division compliant with python3
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-08-16 14:19:02 -07:00
BrentHoltsclaw 18827a8574 Cleanup use is for None type compare
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-08-16 14:18:47 -07:00
LeaMessenger 72419667f5 Cputestrun (#642)
* Updated info, cpuid, and cr to argparse

* Updated to argparse

Signed-off-by: Lea Messenger <lea.messenger@intel.com>
2019-08-15 22:19:03 -07:00
Erik Bjorge bf490b5bed Remove debug print of all IOCTL data
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-08-15 14:12:36 -07:00
Erik Bjorge d2877a4786 Handle exception if PCI enumeration fails
When running the unit test framework PCI Enumreation will most likely
fail and generate an exception.  This is handled by catching the
exception and providing an empy list.  This will resolve the unit
test failues seen with the previous patch.

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-08-15 14:12:16 -07:00
Erik Bjorge f241961e05 Make PCI Enumeration quiet by default
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-08-15 14:12:16 -07:00
BrentHoltsclaw 2efeda4345 Merge python3-rc2 branch into master (#656) 2019-08-15 14:11:20 -07:00
BrentHoltsclaw ee40421098 Update to verion 1.3.8
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
1.3.8
2019-07-23 14:50:36 -07:00
BrentHoltsclaw b97905b73a Add support to use python build_ext -i command on windows
(assuming VS and WDK are installed)

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-07-23 14:01:50 -07:00
BrentHoltsclaw ff8ae0fa25 Reorder decompress Compress section algorithms
Address issue #609

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-07-23 14:01:29 -07:00
Erik Bjorge 639553880e Adding Revision ID reporting to chipset detection
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-07-23 11:16:09 -07:00
Erik Bjorge 3d845d9a4c Made logging modes selectable
Verbose, HAL and debug logging modes are now each selectable.

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-07-23 11:14:53 -07:00
Erik Bjorge 0e14b2e0b5 Additonal handle casting changes
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-07-23 11:14:37 -07:00
Erik Bjorge 2077bd3aec Fixed exception when debug mode enabled.
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-07-23 11:14:37 -07:00
Erik Bjorge ed544448b9 Adding fixed address fallback support
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-07-23 11:14:17 -07:00
BrentHoltsclaw abf3f627e6 Cleanup of debug_cleanup module
Removed hardcoded offsets

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-07-23 11:13:19 -07:00
Erik Bjorge f4408c5cf8 Adding case for PRMRR Base/Mask set to zero.
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-07-23 11:12:53 -07:00
Lea Messenger 182b96c67d Fixed argparse changes based on feedback
Signed-off-by: Lea Messenger <lea.messenger@intel.com>
2019-07-22 21:36:55 -07:00
Lea Messenger 6fb8faa6f0 Updated to use argparse
Signed-off-by: Lea Messenger <lea.messenger@intel.com>
2019-07-22 21:36:55 -07:00
Gabriel Ibarra 905022257f Added unwinding info for amd64 assembly 2019-07-17 10:29:21 -07:00
BrentHoltsclaw 4f332a65e7 Fixed return length for windows smi function
changed from 0 to size of registers
fix for issue #620

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-07-17 10:28:35 -07:00
Frinzell be3f441425 Add suggested checks 2019-07-17 10:28:00 -07:00
Frinzell fbb9bfc6ac Minor formatting update 2019-07-17 10:28:00 -07:00
Frinzell 30887db9db Improved discovery 2019-07-17 10:28:00 -07:00
Frinzell 1b2ef1e571 Add dynamic bus support 2019-07-17 10:28:00 -07:00
BrentHoltsclaw 7e95c0e546 Fixes for EFI_SECTION_COMPRESSION logic within decompress routine
added COMPRESSION_ALGORITHMS within chipsec/defines
modified logic witin spi_uefi to rotate through valid algorithms until one is found
modified error within helpers where a list was put inside a list
modified linux helper to use subprocess.call opposed to subprocess.check_output
fixes issues #609, #610, #611

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-07-17 10:10:12 -07:00
BrentHoltsclaw f5d08081e0 fixup evsa guid
address issue #603

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-07-17 10:04:36 -07:00
Federico Perez 25b390f5cc Fix trailing whitespace on TianoDecompress command call 2019-07-17 10:03:21 -07:00
Ignacio Hernandez 44c5acb1b3 Register definition updates
Added ACPIBaseLock control and removed duplicated register
definition from bdx and hsx platforms

Signed-off-by: Ignacio Hernandez <ignacio.hernandez@intel.com>
2019-07-16 09:52:29 -07:00
BrentHoltsclaw 8920531c7a chipsec_util return proper error codes
comm.run will return the exitcode from the command
If a command is not defined returns 2.
For no command present or help command display the list of commands and help return 0.
2019-07-16 09:47:48 -07:00
BrentHoltsclaw 2d1d96b5cb Util_cmd cpu fixup info command
Changed find_EFI_Configuration_Table to not log error and only log if HAL logging is enabled
Changed get_number_threads_from_APIC_table to utilize return structure from get_parse_ACPI_table

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-07-16 09:47:17 -07:00
Ignacio Hernandez ae4dc27e38 Fix the set_affinity method, was calling wrong lower level method
Signed-off-by: Ignacio Hernandez <ignacio.hernandez@intel.com>
2019-07-16 09:46:58 -07:00
Eli 84f470eff1 Removed workaround for RwEverything over Hyper-V
A workaround for RWE driver causing CHIPSEC over Hyper-V to report SMRR is not supported regardless of used driver.
Since CHIPSEC manual states that it no longer supprts RwEverything driver on Windows, that workaround should be removed.
If this workaround is still needed for some reason, better tell RWE driver from CHIPSEC driver, and act accordingly.
2019-07-03 10:42:52 -07:00
Frinzell 6995bb49f5 Add SKX support 2019-06-25 15:56:56 -07:00
Frinzell c0306772f2 HSX and BDX config updates 2019-06-25 15:56:06 -07:00
Aaron Frinzell bd80785292 C60X,C61X,C620 PCH updates (#578)
* C60X,C61X,C620 PCH updates

* Updated from comments
2019-06-25 15:54:45 -07:00
Erik Bjorge ab829befd5 Add ability to reset the SMBus controller
Added code to use the Soft SMBjs Reset and wait for the reset to complete.

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-06-24 11:28:57 -07:00
Erik Bjorge 27166207c8 Handle case where DIMM can't type is unknown
If the DIMM type is unknown don't attempt to print uninitialized data.

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-06-24 11:28:57 -07:00
BrentHoltsclaw 0db6f1263a Allow utilcmds to return Exitcodes 2019-06-13 13:16:57 -07:00
Jesse Michael cbb6ea45c0 Use logger functions instead of print and set self.res before returning in case of error 2019-06-13 13:15:25 -07:00
Jesse Michael 6fa21fc97c If SPD_WD is not set, fail the check if SPDs only are detected, informational message otherwise 2019-06-13 13:15:25 -07:00
Jesse Michael 1f52d84777 Add vulnerability check to verify that SPD Write Disable bit in SMBus controller bit is set 2019-06-13 13:15:25 -07:00
Erik Bjorge a0bd13b320 Fix exception on UEFI Shell
Fixes issue #592

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2019-06-10 13:45:06 -07:00
nha c64a4cdd9f % to format and copyright 2019-06-10 13:44:28 -07:00